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Message-ID: <20251104-paralyze-creature-d2ab0ce2566a@wendy>
Date: Tue, 4 Nov 2025 08:46:23 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
CC: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>, "Krzysztof
Kozlowski" <krzk+dt@...nel.org>, <linux-riscv@...ts.infradead.org>,
<linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, Daire McNamara <daire.mcnamara@...rochip.com>,
Valentina Fernandez Alanis <valentina.fernandezalanis@...rochip.com>, "Cyril
Jean" <cyril.jean@...rochip.com>
Subject: Re: [PATCH v1 1/3] spi: microchip: rename driver file and internal
identifiers
On Mon, Nov 03, 2025 at 04:05:13PM +0000, Prajna Rajendra Kumar wrote:
> The spi-microchip-core.c driver provides support for the Microchip
> PolarFire SoC (MPFS) "hard" SPI controller. It was originally named
> "core" with the expectation that it might also cover Microchip's
> CoreSPI "soft" IP, but that never materialized.
>
> The CoreSPI IP cannot be supported by this driver because its register
> layout differs substantially from the MPFS SPI controller. In practice
> most of the code would need to be replaced to handle those differences
> so keeping the drivers separate is the simpler approach.
>
> The file and internal symbols are renamed to reflect MPFS support and
> to free up "spi-microchip-core.c" for CoreSPI driver.
>
> Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
Renaming the driver from spi-mpfs to spi-microchip-core was my mistake,
based on the knowledge that the coreSPI IP is what had been hardened and
use in the mpfs device. I didn't expect that the register layout had
been changed so dramatically between the two, when all other "hardened" IP
just added extra bits in registers or whole new registers.
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
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