linux-kernel - Re: [PATCH v1 2/3] spi: dt-binding: document Microchip CoreSPI

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Message-ID: <20251104-ground-cosponsor-83409ccea3f0@wendy>
Date: Tue, 4 Nov 2025 08:48:55 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
CC: Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>, "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>, <linux-riscv@...ts.infradead.org>,
	<linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<devicetree@...r.kernel.org>, Daire McNamara <daire.mcnamara@...rochip.com>,
	Valentina Fernandez Alanis <valentina.fernandezalanis@...rochip.com>, "Cyril
 Jean" <cyril.jean@...rochip.com>
Subject: Re: [PATCH v1 2/3] spi: dt-binding: document Microchip CoreSPI

On Mon, Nov 03, 2025 at 04:05:14PM +0000, Prajna Rajendra Kumar wrote:
> Add device tree bindings for Microchip's CoreSPI controller.
> 
> CoreSPI is a "soft" IP core intended for FPGA implementations. Its
> configurations are set in Libero. These properties represent
> non-discoverable configurations determined by Verilog parameters to the
> IP.
> 
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>

Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

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