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Date: Tue, 4 Nov 2025 09:02:58 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
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Subject: RE: [PATCH v9 2/3] dt-bindings: PCI: pci-imx6: Add external reference
clock input
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: 2025年11月3日 0:05
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: robh@...nel.org; krzk+dt@...nel.org; conor+dt@...nel.org;
> bhelgaas@...gle.com; Frank Li <frank.li@....com>; l.stach@...gutronix.de;
> lpieralisi@...nel.org; kwilczynski@...nel.org; mani@...nel.org;
> shawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> festevam@...il.com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> imx@...ts.linux.dev; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v9 2/3] dt-bindings: PCI: pci-imx6: Add external reference
> clock input
>
> On Fri, Oct 31, 2025 at 11:19:06AM +0800, Richard Zhu wrote:
> > i.MX95 PCIes have two reference clock inputs: one from internal PLL,
> > the other from off chip crystal oscillator. The "extref" clock refers
> > to a reference clock from an external crystal oscillator.
> >
> > Add external reference clock input for i.MX95 PCIes.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > Reviewed-by: Frank Li <Frank.Li@....com>
> > ---
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 +++++--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > index ca5f2970f217c..703c776d28e6f 100644
> > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> > @@ -44,7 +44,7 @@ properties:
> >
> > clock-names:
> > minItems: 3
> > - maxItems: 5
> > + maxItems: 6
> >
> > interrupts:
> > minItems: 1
> > @@ -212,14 +212,17 @@ allOf:
> > then:
> > properties:
> > clocks:
> > - maxItems: 5
> > + minItems: 4
> > + maxItems: 6
> > clock-names:
> > + minItems: 4
> > items:
> > - const: pcie
> > - const: pcie_bus
> > - const: pcie_phy
> > - const: pcie_aux
> > - const: ref
>
> This was required last time. Nothing in commit msg explained changing that.
>
> > + - const: extref # Optional
>
> Drop the comment, do not repeat the schema. And why only this is marked
> as optional if 'ref' is optional as well now.
Hi Krzysztof:
Thanks for your comments, I know what's the problem in this patch.
Firstly, the minItem and maxItem of i.MX95 PCIe clocks should be 5 and 6.
Because that the "ref" clock is not an optional clock for i.MX95 PCIes.
How about to update the commits as follows?
"
i.MX95 PCIes have two reference clock inputs: one from internal PLL. It's
wired inside chip and present as "ref" clock. It's not an optional clock.
The other from off chip crystal oscillator. The "extref" clock refers to a
reference clock from an external crystal oscillator through the CLKIN_N/P pair
PADs. It is an optional clock, relied on the board design.
Add additional optional external reference clock input for i.MX95 PCIes.
"
Thanks.
Best Regards
Richard Zhu
>
> It is v9, can you please really think thoroughly what you are sending, so
> obvious issues won't be there?
>
> Best regards,
> Krzysztof
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