linux-kernel - Re: [PATCH v1 2/3] spi: dt-binding: document Microchip CoreSPI

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Message-ID: <015568df-63d8-45ed-bb21-b09fe323b528@kernel.org>
Date: Tue, 4 Nov 2025 10:23:02 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>,
 Mark Brown <broonie@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 linux-riscv@...ts.infradead.org, linux-spi@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 Conor Dooley <conor.dooley@...rochip.com>,
 Daire McNamara <daire.mcnamara@...rochip.com>,
 Valentina Fernandez Alanis <valentina.fernandezalanis@...rochip.com>,
 Cyril Jean <cyril.jean@...rochip.com>
Subject: Re: [PATCH v1 2/3] spi: dt-binding: document Microchip CoreSPI

On 03/11/2025 17:05, Prajna Rajendra Kumar wrote:
> Add device tree bindings for Microchip's CoreSPI controller.
> 
> CoreSPI is a "soft" IP core intended for FPGA implementations. Its
> configurations are set in Libero. These properties represent
> non-discoverable configurations determined by Verilog parameters to the
> IP.
> 
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
> ---
>  .../bindings/spi/microchip,mpfs-spi.yaml      | 65 +++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> index 62a568bdbfa0..62c38d0c93e7 100644
> --- a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> +++ b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
> @@ -26,6 +26,7 @@ properties:
>            - const: microchip,pic64gx-spi
>            - const: microchip,mpfs-spi
>        - const: microchip,mpfs-spi
> +      - const: microchip,corespi-rtl-v5 # FPGA CoreSPI

Please keep alphabetical order. Or better, combine such (you have there
already!) into enum.


Best regards,
Krzysztof