linux-kernel - [PATCH v2 net-next 0/3] net: enetc: add port MDIO support for both i.MX94 and i.MX95

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Message-Id: <20251105043344.677592-1-wei.fang@nxp.com>
Date: Wed,  5 Nov 2025 12:33:41 +0800
From: Wei Fang <wei.fang@....com>
To: claudiu.manoil@....com,
	vladimir.oltean@....com,
	xiaoning.wang@....com,
	andrew+netdev@...n.ch,
	davem@...emloft.net,
	edumazet@...gle.com,
	kuba@...nel.org,
	pabeni@...hat.com
Cc: aziz.sellami@....com,
	imx@...ts.linux.dev,
	netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v2 net-next 0/3] net: enetc: add port MDIO support for both i.MX94 and i.MX95

>From the hardware perspective, NETC IP has only one external master MDIO
interface (eMDIO) for managing external PHYs. The EMDIO function and the
ENETC port MDIO are all virtual ports of the eMDIO.

The difference is that EMDIO function is a 'global port', it can access
all the PHYs on the eMDIO, so it provides a means for different software
modules to share a single set of MDIO signals to access their PHYs.

But for ENETC port MDIO, each ENETC can access its set of registers to
initiate accesses on the MDIO and the eMDIO arbitrates between them,
completing one access before proceeding with the next. It is required
that each ENETC port MDIO has exclusive access and control of its PHY.
Therefore, we need to set the external PHY address for ENETCs, so that
its port MDIO can only access its own PHY. If the PHY address accessed
by the port MDIO is different from the preset PHY address, the MDIO
access will be invalid.

Normally, all ENETCs use the interfaces provided by the EMDIO function
to access their PHYs, provided that the ENETC and EMDIO are on the same
OS. If an ENETC is assigned to a guest OS, it will not be able to use
the interfaces provided by the EMDIO function, so it must uses its port
MDIO to access and manage its PHY.

In DTS, when the PHY node is a child node of EMDIO, ENETC will use EMDIO
to access the PHY. If ENETC wants to use port MDIO, it only needs to add
a mdio child node to the ENETC node.

Different from the external MDIO interface, each ENETC has an internal
MDIO interface for managing on-die PHY (PCS) if it has PCS layer. The
internal MDIO interface is controlled by the internal MDIO registers of
the ENETC port.

---
v2 changes:
Improve the commit message.
v1 link: https://lore.kernel.org/imx/20251030091538.581541-1-wei.fang@nxp.com/
---

Aziz Sellami (1):
  net: enetc: set external MDIO PHY address for i.MX95 ENETC

Wei Fang (2):
  net: enetc: set external MDIO PHY address for i.MX94 ENETC
  net: enetc: add port MDIO support for ENETC v4

 .../net/ethernet/freescale/enetc/enetc4_hw.h  |   6 +
 .../freescale/enetc/enetc_pf_common.c         |  14 ++-
 .../ethernet/freescale/enetc/netc_blk_ctrl.c  | 111 +++++++++++++++++-
 3 files changed, 128 insertions(+), 3 deletions(-)

-- 
2.34.1