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Message-ID: <0bc327b3-ea1d-4d70-ba51-e79fd386f6fe@163.com>
Date: Wed, 5 Nov 2025 21:44:45 +0800
From: Hans Zhang <18255117159@....com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: bhelgaas@...gle.com, helgaas@...nel.org, linux-pci@...r.kernel.org,
LKML <linux-kernel@...r.kernel.org>, Manivannan Sadhasivam <mani@...nel.org>
Subject: Re: [PATCH v3 1/1] PCI: of: Relax max-link-speed check to support
PCIe Gen5/Gen6
On 2025/11/5 16:45, Ilpo Järvinen wrote:
> On Wed, 5 Nov 2025, Ilpo Järvinen wrote:
>
>> On Sun, 2 Nov 2025, Hans Zhang wrote:
>>
>>> The existing code restricted `max-link-speed` to values 1~4 (Gen1~Gen4),
>>> but current SOCs using Synopsys/Cadence IP may require Gen5/Gen6 support.
>>>
>>> While DT binding validation already checks this property, the code-level
>>> validation in `of_pci_get_max_link_speed` also needs to be updated to allow
>>> values up to 6, ensuring compatibility with newer PCIe generations.
>>>
>>> Signed-off-by: Hans Zhang <18255117159@....com>
>>> Reviewed-by: Manivannan Sadhasivam <mani@...nel.org>
>>> ---
>>> Changes for v3:
>>> - Modify the commit message.
>>> - Add Reviewed-by tag.
>>>
>>> Changes for v2:
>>> https://patchwork.kernel.org/project/linux-pci/cover/20250529021026.475861-1-18255117159@163.com/
>>> - The following files have been deleted:
>>> Documentation/devicetree/bindings/pci/pci.txt
>>>
>>> Update to this file again:
>>> dtschema/schemas/pci/pci-bus-common.yaml
>>> ---
>>> drivers/pci/of.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
>>> index 3579265f1198..53928e4b3780 100644
>>> --- a/drivers/pci/of.c
>>> +++ b/drivers/pci/of.c
>>> @@ -890,7 +890,7 @@ int of_pci_get_max_link_speed(struct device_node *node)
>>> u32 max_link_speed;
>>>
>>> if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
>>> - max_link_speed == 0 || max_link_speed > 4)
>>> + max_link_speed == 0 || max_link_speed > 6)
>>> return -EINVAL;
>>>
>>> return max_link_speed;
>>>
>>
>> Hi,
>>
>> IMO, using a literal here is somewhat annoying as it's hard to find this
>> spot when adding support to the next PCIe Link Speed. It would be nice if
>> it could get updated at the same while the generic support for a new Link
>> Speed is added.
>>
>> Perhaps include/linux/pci.h should have something along the lines of:
>>
>> static inline int pcie_max_supported_link_speed()
>> {
>> return PCI_EXP_LNKCAP_SLS_64_0GB - PCI_EXP_LNKCAP_SLS_2_5GB + 1;
>> }
>
> ...Or maybe put it just to drivers/pci/pci.h instead.
>
>> Then replace that 6 with pcie_max_supported_link_speed().
>>
>> So when the next speed get's added, somebody grepping for
>> PCI_EXP_LNKCAP_SLS_64_0GB will find pcie_max_supported_link_speed() has
>> to be changed and the change will propagate also to of.c.
>>
>>
>
Hi Ilpo,
Thank you very much for your reply. Your feedback is so great. I will
resubmit a version. Thank you again.
Best regards,
Hans
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