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Message-ID: <20251107-overprice-reselect-c3a742a2d8b3@spud>
Date: Fri, 7 Nov 2025 17:00:37 +0000
From: Conor Dooley <conor@...nel.org>
To: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Cc: Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
"magnus.damm" <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document
RZ/T2H and RZ/N2H
On Thu, Nov 06, 2025 at 06:02:01PM +0000, Cosmin-Gabriel Tanislav wrote:
>
>
> > -----Original Message-----
> > From: Conor Dooley <conor@...nel.org>
> > Sent: Thursday, November 6, 2025 7:58 PM
> > To: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
> > Cc: Fabrizio Castro <fabrizio.castro.jz@...esas.com>; Mark Brown <broonie@...nel.org>; Rob Herring
> > <robh@...nel.org>; Krzysztof Kozlowski <krzk+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>; Geert
> > Uytterhoeven <geert+renesas@...der.be>; magnus.damm <magnus.damm@...il.com>; Michael Turquette
> > <mturquette@...libre.com>; Stephen Boyd <sboyd@...nel.org>; Philipp Zabel <p.zabel@...gutronix.de>;
> > linux-spi@...r.kernel.org; linux-renesas-soc@...r.kernel.org; devicetree@...r.kernel.org; linux-
> > kernel@...r.kernel.org; linux-clk@...r.kernel.org; Conor Dooley <conor.dooley@...rochip.com>
> > Subject: Re: [PATCH 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
> >
> > On Wed, Nov 05, 2025 at 11:13:55AM +0200, Cosmin Tanislav wrote:
> > > The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI
> > > peripherals.
> > >
> > > Compared to the previously supported RZ/V2H, these SoCs have a smaller
> > > FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn,
> > > being the clock from which the SPI transfer clock is generated, is the
> > > equivalent of the TCLK from V2H.
> > >
> > > Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are
> > > entirely compatible.
> > >
> > > Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
> > > Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> >
> > Why is this a v1 with my ack?
>
> I forgot to bump the version to V2. I've sent V3 afterwards to amend it.
Ah, I didnt notice that. Thanks.
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