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Message-ID: <aRIW-tksre10iB1v@debian-BULLSEYE-live-builder-AMD64>
Date: Mon, 10 Nov 2025 13:46:50 -0300
From: Marcelo Schmitt <marcelo.schmitt1@...il.com>
To: Nuno Sá <noname.nuno@...il.com>
Cc: Marcelo Schmitt <marcelo.schmitt@...log.com>, linux-iio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org, jic23@...nel.org, nuno.sa@...log.com,
	dlechner@...libre.com, andy@...nel.org,
	Michael.Hennerich@...log.com, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, corbet@....net, cosmin.tanislav@...log.com
Subject: Re: [PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

Hi Nuno,

On 11/10, Nuno Sá wrote:
> On Mon, 2025-11-10 at 09:44 -0300, Marcelo Schmitt wrote:
> > This patch series adds basic support for ad4134. AD4134 is a very flexible
> > device that can be configured in many different ways. This series aims to
> > support the simplest way of interfacing with AD4134 which is called minimum I/O
> > mode in data sheet. This is essentially usual SPI with the addition of an ODR
> > (Output Data Rate) GPIO which functions as conversion start signal in minimum
> > I/O mode. The CS pin may be connected to a host controller CS pin or grounded.
> > 
> > This set provides just one feature:
> > - Single-shot ADC sample read.
> > 
> > [PATCH 1] Device tree documentation for AD4134.
> > [PATCH 2] IIO Linux driver for AD4134.
> > [PATCH 3] Initial IIO documentation.
> > 
> > There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
> > configurations suited for high speed data transfers. Even though the minimum I/O
> > support was initialy based on that high speed transfer driver, the result ended
> > up becoming entirely different. Also, because the different wiring
> > configurations are likely going to use different resources and software
> > interfaces, the code for AD4134 support was split into ad4134-spi.c,
> > ad4134-common.h, and ad4134-common.c.
> 
> I'm familiar with the odd way this part is implemented in ADI tree :). Question is, are
> you intending to support the high speed bits? I guess so, otherwise having the above split
> would not make much sense.
> 
Yes, the intent is that the common parts may be reusable by the high speed
driver when we get to upstream that. For now, this only supports conventional SPI.
We may, at least, get some support for AD4134, though.

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