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Message-ID: <44c7b4a8-33ce-4516-81bf-349b5e555806@oss.qualcomm.com>
Date: Thu, 13 Nov 2025 09:33:54 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: Lukas Wunner <lukas@...ner.de>
Cc: andersson@...nel.org, robh@...nel.org, manivannan.sadhasivam@...aro.org,
        krzk@...nel.org, helgaas@...nel.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, lpieralisi@...nel.org, kw@...ux.com,
        conor+dt@...nel.org, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree-spec@...r.kernel.org,
        quic_vbadigan@...cinc.com
Subject: Re: [PATCH v2] schemas: pci: Document PCIe T_POWER_ON


On 11/10/2025 6:11 PM, Lukas Wunner wrote:
> On Mon, Nov 10, 2025 at 04:59:47PM +0530, Krishna Chaitanya Chundru wrote:
>>  From PCIe r6, sec 5.5.4 & Table 5-11 in sec 5.5.5 T_POWER_ON is the
> Please use the latest spec version as reference, i.e. PCIe r7.0.
ack.
>> minimum amount of time(in us) that each component must wait in L1.2.Exit
>> after sampling CLKREQ# asserted before actively driving the interface to
>> ensure no device is ever actively driving into an unpowered component and
>> these values are based on the components and AC coupling capacitors used
>> in the connection linking the two components.
>>
>> This property should be used to indicate the T_POWER_ON for each Root Port.
> What's the difference between this property and the Port T_POWER_ON_Scale
> and T_POWER_ON_Value in the L1 PM Substates Capabilities Register?
>
> Why do you need this in the device tree even though it's available
> in the register?

This value is same as L1 PM substates value, some controllers needs to 
update this
value before enumeration as hardware might now program this value 
correctly[1].

[1]: [PATCH] PCI: qcom: Program correct T_POWER_ON value for L1.2 exit 
timing

<https://lore.kernel.org/all/20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com/>- 
Krishna Chaitanya.

> Thanks,
>
> Lukas

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