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Message-ID: <20251113122229.23998-2-angelogioacchino.delregno@collabora.com>
Date: Thu, 13 Nov 2025 13:22:22 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: dmaengine@...r.kernel.org
Cc: sean.wang@...iatek.com,
vkoul@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com,
long.cheng@...iatek.com,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
kernel@...labora.com
Subject: [PATCH 1/8] dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible
While it is true that this SoC is compatible with the MT6577 APDMA
IP, that is valid only when the IP is used in 32-bits addressing
mode, and, by the way there is no good reason to do so.
Since the APDMA IP in MT6795 supports 33 bits addressing, this
means that it is a newer revision compared to the one found in
MT6577, hence only partially compatible with it.
Allow nodes to specify "mediatek,mt6795-uart-dma" as their only
compatible in the case of MT6795; this is done in lieu of the fact
that there are other SoCs integrating the same version of this IP
as MT6795, and those will eventually get their own compatible that
expresses full compatibility with this SoC.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
index dab468a88942..10fc92b60de5 100644
--- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
@@ -28,6 +28,7 @@ properties:
- const: mediatek,mt6577-uart-dma
- enum:
- mediatek,mt6577-uart-dma
+ - mediatek,mt6795-uart-dma
reg:
minItems: 1
--
2.51.1
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