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Message-ID: <000601dc552c$a63e6060$f2bb2120$@samsung.com>
Date: Fri, 14 Nov 2025 15:05:16 +0900
From: "Sanghoon Bae" <sh86.bae@...sung.com>
To: "'Krzysztof Kozlowski'" <krzk@...nel.org>, <robh@...nel.org>,
<conor+dt@...nel.org>, <vkoul@...nel.org>, <alim.akhtar@...sung.com>,
<kishon@...nel.org>, <m.szyprowski@...sung.com>, <jh80.chung@...sung.com>,
<shradha.t@...sung.com>
Cc: <krzk+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>,
<linux-phy@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for
ExynosAutov920 SoC
> > Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
> > for it in the Exynosautov920 PCIe PHY bindings.
> >
> > The Exynosautov920 SoC includes two PHY instances: one for a 4-lane
> > PHY and another for a 2-lane PHY. Each PHY can be used by separate
> > controllers through the bifurcation option. Therefore, from 2 up to 4
> > PCIe controllers can be supported and connected with this PHY driver.
>
>
> Describe hardware, not driver.
I will describe about the Exynosautov920 SoC PCIe hardware.
> > PCIe lane number is used to distinguish each PHY instance.
> > This is required since two PHY instances on ExynosAutov920 is not
> > identical.
> > On PHY driver code, need to check each instance and different settings.
>
>
> Describe hardware, not driver.
I will describe about the Exynosautov920 SoC PCIe hardware.
> > @@ -19,6 +19,7 @@ properties:
> > - samsung,exynos5433-pcie-phy
> > - tesla,fsd-pcie-phy0
> > - tesla,fsd-pcie-phy1
> > + - samsung,exynosautov920-pcie-phy
>
> Messed order.
Will fix the order
> > @@ -42,6 +47,7 @@ allOf:
> > enum:
> > - tesla,fsd-pcie-phy0
> > - tesla,fsd-pcie-phy1
> > + - samsung,exynosautov920-pcie-phy
>
> Messed order.
Will fix the order
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