linux-kernel - RE: [PATCH 3/4] arm64: dts: ExynosAutov920: add PCIe PHY DT nodes

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Message-ID: <001601dc5533$eb0049f0$c100ddd0$@samsung.com>
Date: Fri, 14 Nov 2025 15:57:18 +0900
From: "SanghoonBae" <sh86.bae@...sung.com>
To: "'Krzysztof Kozlowski'" <krzk@...nel.org>, <robh@...nel.org>,
	<conor+dt@...nel.org>, <vkoul@...nel.org>, <alim.akhtar@...sung.com>,
	<kishon@...nel.org>, <m.szyprowski@...sung.com>, <jh80.chung@...sung.com>,
	<shradha.t@...sung.com>
Cc: <krzk+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>,
	<linux-phy@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH 3/4] arm64: dts: ExynosAutov920: add PCIe PHY DT nodes

> > +		pcie_2l_phy: pcie-phy2l@...c6000{
> 
> 
> 
> Node names should be generic. See also an explanation and list of examples
> (not exhaustive) in DT specification:
> https://protect2.fireeye.com/v1/url?k=d2bcf1f2-8d273f96-d2bd7abd-
> 000babda0201-1fe7eb4ecd262f65&q=1&e=8522e96d-f1a1-4b6b-baa9-
> 44344340469a&u=https%3A%2F%2Fdevicetree-
> specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devicetree-
> basics.html%23generic-names-recommendation
> If you cannot find a name matching your device, please check in kernel
> sources for similar cases or you can grow the spec (via pull request to DT
> spec repo).
I will rename the node referring the guideline you linked.

> Plus style issues... missing space.
Will add space before left brace.

> I would like to see also PCIe nodes somewhere, because I wonder if num-
> lanes should not be moved to PCI node (phy consumer) instead.
> Current approach feels better, but maybe it just duplicates num-lanes from
> the PCI?
As mentioned earlier, I plan to enable the PCIe nodes later.
However, I can share my prototype PCIe node that I am currently using for
PCIe driver testing:

pcie_0: pcie@...c0000 {
	compatible = "samsung,exynosautov920-pcie";
	gpios = <&gph0 1 0>;	/* PERST */
	reg = <0x163C0000 0x1000>, <0x12000000 0x20000>,
		<0x2fffd000 0x2000>, <0x12600000 0x2000>;
	reg-names = "elbi", "dbi", "config", "atu";
	#address-cells = <3>;
	#size-cells = <2>;
	#interrupt-cells = <1>;
	device_type = "pci";
	interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-map-mask = <0 0 0 0>;
	interrupt-map = <0 0 0 0 &gic GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&xtcxo>;
	clock-names = "ref_clk";
	num-lanes = <1>;
	num-viewport = <3>;
	bus-range = <0x00 0xff>;
	phys = <&pcie_0_phy>;
	samsung,pcie-ch = <0>;
	ranges = <0x82000000 0 0x20000000 0x20000000 0 0x1FFFD000>;
	status = "disabled";
};

As you expected, num-lanes will be defined only in the PCIe node.
Please let me know if this composition of the DT nodes looks appropriate
to you.