linux-kernel - [PATCH v3 2/2] serial: sh-sci: Fix deadlock during RSCI FIFO overrun error

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Message-ID: <20251114101350.106699-3-biju.das.jz@bp.renesas.com>
Date: Fri, 14 Nov 2025 10:13:47 +0000
From: Biju <biju.das.au@...il.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>
Cc: Biju Das <biju.das.jz@...renesas.com>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Wolfram Sang <wsa+renesas@...g-engineering.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
	Nam Cao <namcao@...utronix.de>,
	linux-kernel@...r.kernel.org,
	linux-serial@...r.kernel.org,
	Biju Das <biju.das.au@...il.com>,
	linux-renesas-soc@...r.kernel.org,
	stable@...nel.org
Subject: [PATCH v3 2/2] serial: sh-sci: Fix deadlock during RSCI FIFO overrun error

From: Biju Das <biju.das.jz@...renesas.com>

On RSCI IP, a deadlock occurs during a FIFO overrun error, as it uses a
different register to clear the FIFO overrun error status.

Cc: stable@...nel.org
Fixes: 0666e3fe95ab ("serial: sh-sci: Add support for RZ/T2H SCI")
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
---
v2->v3:
 * Dropped overrun_clr from struct sci_port_params_bits
 * All of the CFCLR_*C clearing bits match the corresponding
   CSR_*status bits. So, reused the overrun mask for irq clearing.
v1->v2:
 * Split the fixes patches from original series.
---
 drivers/tty/serial/sh-sci.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index b28711eeab71..53edbf1d8963 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1198,8 +1198,16 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
 
 	status = s->ops->read_reg(port, s->params->overrun_reg);
 	if (status & s->params->overrun_mask) {
-		status &= ~s->params->overrun_mask;
-		s->ops->write_reg(port, s->params->overrun_reg, status);
+		if (s->type == SCI_PORT_RSCI) {
+			/*
+			 * All of the CFCLR_*C clearing bits match the corresponding
+			 * CSR_*status bits. So, reuse the overrun mask for clearing.
+			 */
+			s->ops->clear_SCxSR(port, s->params->overrun_mask);
+		} else {
+			status &= ~s->params->overrun_mask;
+			s->ops->write_reg(port, s->params->overrun_reg, status);
+		}
 
 		port->icount.overrun++;
 
-- 
2.43.0