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Message-ID:
 <TY3PR01MB113467AFC001615450B06E82E86CAA@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Fri, 14 Nov 2025 12:00:45 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Uwe Kleine-König <ukleinek@...nel.org>, biju.das.au
	<biju.das.au@...il.com>
CC: "linux-pwm@...r.kernel.org" <linux-pwm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Geert
 Uytterhoeven <geert+renesas@...der.be>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>
Subject: RE: [PATCH v3 1/2] pwm: rzg2l-gpt: Reinitialize cache value

Hi Uwe,

Thanks for the feedback.

> -----Original Message-----
> From: Uwe Kleine-König <ukleinek@...nel.org>
> Sent: 06 November 2025 09:36
> Subject: Re: [PATCH v3 1/2] pwm: rzg2l-gpt: Reinitialize cache value
> 
> On Mon, Sep 15, 2025 at 05:36:30PM +0100, Biju wrote:
> > From: Biju Das <biju.das.jz@...renesas.com>
> >
> > Reinitialize the cache value to 0 during disable().
> >
> > Fixes: 061f087f5d0b ("pwm: Add support for RZ/G2L GPT")
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > ---
> > v3:
> >  * New patch.
> > ---
> >  drivers/pwm/pwm-rzg2l-gpt.c | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pwm/pwm-rzg2l-gpt.c b/drivers/pwm/pwm-rzg2l-gpt.c
> > index 360c8bf3b190..b2452e50d618 100644
> > --- a/drivers/pwm/pwm-rzg2l-gpt.c
> > +++ b/drivers/pwm/pwm-rzg2l-gpt.c
> > @@ -190,8 +190,10 @@ static void rzg2l_gpt_disable(struct rzg2l_gpt_chip *rzg2l_gpt,
> >  	/* Stop count, Output low on GTIOCx pin when counting stops */
> >  	rzg2l_gpt->channel_enable_count[ch]--;
> >
> > -	if (!rzg2l_gpt->channel_enable_count[ch])
> > +	if (!rzg2l_gpt->channel_enable_count[ch]) {
> >  		rzg2l_gpt_modify(rzg2l_gpt, RZG2L_GTCR(ch), RZG2L_GTCR_CST, 0);
> > +		rzg2l_gpt->period_ticks[ch] = 0;
> > +	}
> 
> A code comment and/or a more verbose commit log would be very welcome.

Thanks, will add both code comment/commit log for reinitializing the cache value.

Cheers,
Biju

> 
> >  	/* Disable pin output */
> >  	rzg2l_gpt_modify(rzg2l_gpt, RZG2L_GTIOR(ch),
> > RZG2L_GTIOR_OxE(sub_ch), 0);
> 
> Best regards
> Uwe

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