[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <aRyUoaelqkQTPiPr@lizhi-Precision-Tower-5810>
Date: Tue, 18 Nov 2025 10:45:37 -0500
From: Frank Li <Frank.li@....com>
To: Xu Yang <xu.yang_2@....com>
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, abelvesa@...nel.org, peng.fan@....com,
mturquette@...libre.com, sboyd@...nel.org, hongxing.zhu@....com,
devicetree@...r.kernel.org, imx@...ts.linux.dev, jun.li@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH 2/4] clk: imx95-blk-ctl: fix hsio_blk_ctl_clk_dev_data
reg offset
On Tue, Nov 18, 2025 at 03:40:53PM +0800, Xu Yang wrote:
> The first item of hsio_blk_ctl_clk_dev_data is used to control PCIe
> reference clock. The reg offset should be 0xc0 in HSIO block control
> register map. Correct it so that other hsio block control items can
> be added later. This will also rename the name to "hsio_pcie_clk_gate"
> for better distinction.
>
> Fixes: cf295252f0d8 ("clk: imx95-blk-ctl: Add one clock gate for HSIO block")
> Cc: stable@...r.kernel.org
> Signed-off-by: Xu Yang <xu.yang_2@....com>
> ---
> drivers/clk/imx/clk-imx95-blk-ctl.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c b/drivers/clk/imx/clk-imx95-blk-ctl.c
> index 56bed4471995..3c2019f428c9 100644
> --- a/drivers/clk/imx/clk-imx95-blk-ctl.c
> +++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
> @@ -285,10 +285,10 @@ static const struct imx95_blk_ctl_dev_data netcmix_dev_data = {
>
> static const struct imx95_blk_ctl_clk_dev_data hsio_blk_ctl_clk_dev_data[] = {
> [0] = {
> - .name = "hsio_blk_ctl_clk",
> + .name = "hsio_pcie_clk_gate",
> .parent_names = (const char *[]){ "hsio_pll", },
> .num_parents = 1,
> - .reg = 0,
> + .reg = 0xc0,
This will break compatiblity. DTS is required related change at the same
time to match this change.
Is it possible to create new instance at dts
hsio_blk_ctl0: syscon@...10000 {
...
}
hsio_blk_ctl1: syscon@...100c0 {
...
}
You use <&hsio_blk_ctl1 IMX95_CLK_HSIOMIX_USB_PHY_CLK_SEL>
use IMX95_CLK_HSIOMIX_USB_PHY_CLK_SEL to distingiush which clocks.
Frank
>
>
> .bit_idx = 6,
> .bit_width = 1,
> .type = CLK_GATE,
> --
> 2.34.1
>
Powered by blists - more mailing lists