linux-kernel - Re: [PATCH v2 2/2] arm64: dts: qcom: Add support for Pixel 3 and Pixel 3 XL

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Message-ID: <92165785-c03f-4507-96d0-10442b67691f@oss.qualcomm.com>
Date: Tue, 18 Nov 2025 10:31:32 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: David Heidelberg <david@...t.cz>, Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: phodina@...tonmail.com, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        phone-devel@...r.kernel.org, Amit Pundir <amit.pundir@...aro.org>,
        Casey Connolly <casey@...nolly.tech>,
        Joel Selvaraj <foss@...lselvaraj.com>,
        Sumit Semwal <sumit.semwal@...aro.org>, Vinod Koul <vkoul@...nel.org>
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: Add support for Pixel 3 and
 Pixel 3 XL

On 11/17/25 7:35 PM, David Heidelberg wrote:
> On 30/10/2025 13:10, Konrad Dybcio wrote:
>> On 10/30/25 1:03 PM, David Heidelberg wrote:
>>> On 30/10/2025 12:32, Konrad Dybcio wrote:
>>>> On 10/30/25 8:24 AM, David Heidelberg via B4 Relay wrote:
>>>>> From: David Heidelberg <david@...t.cz>
>>
>> [...]
>>
>>>>> +    battery: battery {
>>>>> +        compatible = "simple-battery";
>>>>> +
>>>>> +        status = "disabled";
>>>>
>>>> You added support for both non-proto boards based on this platform,
>>>> there is no usecase for you to disable the battery, remove this line
>>>
>>> Should I keep the status = "okay" in the board files or drop it too?
>>
>> Drop it, nodes are enabled unless they're explicitly disabled
>>
>> [...]
>>
>>>>> +&tlmm {
>>>>> +    gpio-reserved-ranges = <0 4>, <81 4>;
>>>>
>>>> Could you add a comment (like in x1-crd.dtsi) mentioning what these
>>>> pins correspond to? Usually it's a fingerprint scanner or things like
>>>> that
>>>
>>> Sure, I looked into it, but I haven't found (so far) information about the assigned blocks. In next revision it'll be addressed :)>
>>
>> Thanks, you can usually correlate them to a QUP instance based on the pinctrl
> 
> For now I verified that 0 - 4 is SPI (Intel MNH Pixel Visual Core), but 81 - 84 is at best educated guess SPI (Fingerprint Cards FPC1075).

Fingerprint readers aren't usually wireless, so that's a good bet

Konrad