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Message-ID: <39028d84844a08b8b716eb3941cc02562d21dc84.camel@mediatek.com>
Date: Tue, 18 Nov 2025 09:39:18 +0000
From: Johnny-CC Chang (張晋嘉)
<Johnny-CC.Chang@...iatek.com>
To: "lukas@...ner.de" <lukas@...ner.de>
CC: Project_Global_Digits_Upstream_Group
<Project_Global_Digits_Upstream_Group@...iatek.com>, "AngeloGioacchino Del
Regno" <angelogioacchino.delregno@...labora.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-pci@...r.kernel.org"
<linux-pci@...r.kernel.org>, "linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>, "bhelgaas@...gle.com"
<bhelgaas@...gle.com>, "matthias.bgg@...il.com" <matthias.bgg@...il.com>
Subject: Re: [PATCH] PCI: Mark Nvidia GB10 to avoid bus reset
On Thu, 2025-11-13 at 10:39 +0100, Lukas Wunner wrote:
> On Thu, Nov 13, 2025 at 04:44:06PM +0800, Johnny Chang wrote:
> > Nvidia GB10 PCIe hosts will encounter problem occasionally
> > after SBR(secondary bus reset) is applied.
>
> Could you elaborate what kinds of problems occur, how often they
> occur, etc?
There is about 1/1000 chance that after SBR is applied, any further
access via this root port will be blocked and make system crash.
Thanks,
Johnny
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