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Message-ID: <176342869620.638242.11529006624321296909.b4-ty@gmail.com>
Date: Tue, 18 Nov 2025 09:19:12 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Chen Wang <unicorn_wang@...look.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>,
Zixian Zeng <sycamoremoon376@...il.com>
Cc: Inochi Amaoto <inochiama@...il.com>,
devicetree@...r.kernel.org,
sophgo@...ts.linux.dev,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Han Gao <rabenda.cn@...il.com>,
Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v2 0/4] Add SPI NOR DTS node for SG2042 SoC and boards using it
On Tue, 16 Sep 2025 21:22:49 +0800, Zixian Zeng wrote:
> [PATCH 1/4] and [PATCH 2/4] are copied from patch set [1]
> [PATCH v4 4/4] with content changes:
>
> According to SG2042 Pioneer and SG2042_EVB_V1/V2 schematics, SPI-NOR Flash
> cannot support QSPI due to hardware design.
> Thus spi-(tx|rx)-bus-width must be set to 1.
>
> [...]
Applied to dt/riscv, thanks!
[1/4] riscv: dts: sophgo: Add SPI NOR node for SG2042
https://github.com/sophgo/linux/commit/59dc89fdfe0bbcce186116651bd017cfb9f70fc0
[2/4] riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
https://github.com/sophgo/linux/commit/f49314cbbc98f9ab2bf4eb82ccacbf79f179db6c
[3/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
https://github.com/sophgo/linux/commit/11f4d84c9f724ec4c6810567d6b9713b054bb28b
[4/4] riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
https://github.com/sophgo/linux/commit/af5eb17ff893bf6e52680a31059e1816749c2d20
Thanks,
Inochi
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