[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <176365868405.207696.4847424403085518315.b4-ty@kernel.org>
Date: Thu, 20 Nov 2025 22:41:24 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
André Draszik <andre.draszik@...aro.org>
Cc: Peter Griffin <peter.griffin@...aro.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>,
Will McVicker <willmcvicker@...gle.com>, kernel-team@...roid.com,
linux-phy@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org
Subject: Re: [PATCH] phy: exynos5-usbdrd: fix clock prepare imbalance
On Mon, 06 Oct 2025 09:07:12 +0100, André Draszik wrote:
> Commit f4fb9c4d7f94 ("phy: exynos5-usbdrd: allow DWC3 runtime suspend
> with UDC bound (E850+)") incorrectly added clk_bulk_disable() as the
> inverse of clk_bulk_prepare_enable() while it should have of course
> used clk_bulk_disable_unprepare(). This means incorrect reference
> counts to the CMU driver remain.
>
> Update the code accordingly.
>
> [...]
Applied, thanks!
[1/1] phy: exynos5-usbdrd: fix clock prepare imbalance
commit: 5e428e45bf17a8f3784099ca5ded16e3b5d59766
Best regards,
--
~Vinod
Powered by blists - more mailing lists