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Message-ID:
 <ZQ2PR01MB1307A802B916620235B87518E6D52@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>
Date: Fri, 21 Nov 2025 04:23:35 +0000
From: Hal Feng <hal.feng@...rfivetech.com>
To: Manivannan Sadhasivam <mani@...nel.org>
CC: Conor Dooley <conor+dt@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Palmer Dabbelt
	<palmer@...belt.com>, Paul Walmsley <pjw@...nel.org>, Albert Ou
	<aou@...s.berkeley.edu>, "Rafael J . Wysocki" <rafael@...nel.org>, Viresh
 Kumar <viresh.kumar@...aro.org>, Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo
 Pieralisi <lpieralisi@...nel.org>, Krzysztof WilczyƄski
	<kwilczynski@...nel.org>, Emil Renner Berthing
	<emil.renner.berthing@...onical.com>, Heinrich Schuchardt
	<heinrich.schuchardt@...onical.com>, E Shattow <e@...eshell.de>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 1/5] dt-bindings: PCI: starfive,jh7110-pcie: Add
 enable-gpios property

> On 12.11.25 21:54, Manivannan Sadhasivam wrote:
> On Thu, Nov 20, 2025 at 04:29:42PM +0800, Hal Feng wrote:
> > Add enable-gpios property for controlling the PCI bus device power.
> > This property had been supported in the driver but not added in the
> > dt-bindings.
> >
> > Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> > Fixes: 22fe32239770 ("dt-bindings: PCI: Add StarFive JH7110 PCIe
> > controller")
> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
> > ---
> >  .../devicetree/bindings/pci/starfive,jh7110-pcie.yaml         | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > index 33c80626e8ec..1e36f92ec852 100644
> > --- a/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > +++ b/Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml
> > @@ -59,6 +59,10 @@ properties:
> >      description:
> >        The phandle to System Register Controller syscon node.
> >
> > +  enable-gpios:
> > +    description: GPIO used to enable the PCI bus device power
> 
> This feels wrong to me. Is this GPIO associated with the PCIe controller? I bet
> this is just controlling some regulator that powers the VDD of the PCIe
> device/slot. If so, this should be added as a part of the regulator node and
> referenced in the PCIe node using the existing -supply properties.

This GPIO just controls the power of PCIe devices, not PCIe controller.
I think there may be no design adding power control GPIOs for the PCIe controller,
because usually we don't need to control the PCIe controller power but the PCIe
device power.

I find a similar "pwren-gpios" in
Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml .
It uses the GPIO to control the power of PCIe devices too.

Could I continue to do so? Thanks.

Best regards,
Hal

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