linux-kernel - Re: [PATCH v8 2/2] usb: dwc3: Add Google Tensor SoC DWC3 glue driver

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Message-ID: <CADrjBPqPsPBBSbhx8ZFreFWX2tRxaATT=azS-b1H2b=TJoVAAw@mail.gmail.com>
Date: Sat, 22 Nov 2025 11:58:39 +0000
From: Peter Griffin <peter.griffin@...aro.org>
To: Roy Luo <royluo@...gle.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	André Draszik <andre.draszik@...aro.org>, 
	Tudor Ambarus <tudor.ambarus@...aro.org>, Thinh Nguyen <Thinh.Nguyen@...opsys.com>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Badhri Jagan Sridharan <badhri@...gle.com>, 
	Doug Anderson <dianders@...gle.com>, linux-usb@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-samsung-soc@...r.kernel.org, Joy Chakraborty <joychakr@...gle.com>, 
	Naveen Kumar <mnkumar@...gle.com>
Subject: Re: [PATCH v8 2/2] usb: dwc3: Add Google Tensor SoC DWC3 glue driver

Hi Roy,

Thanks for your patch. It's great to see Laguna support being added upstream.

On Sat, 22 Nov 2025 at 09:32, Roy Luo <royluo@...gle.com> wrote:
>
> Add support for the DWC3 USB controller found on Google Tensor G5
> (codename: laguna). The controller features dual-role functionality
> and hibernation.
>
> The primary focus is implementing hibernation support in host mode,
> enabling the controller to enter a low-power state (D3). This is
> particularly relevant during system power state transition and
> runtime power management for power efficiency.
> Highlights:
> - Align suspend callback with dwc3_suspend_common() for deciding
>   between a full teardown and hibernation in host mode.
> - Integration with `psw` (power switchable) and `top` power domains,
>   managing their states and device links to support hibernation.
> - A notifier callback dwc3_google_usb_psw_pd_notifier() for
>   `psw` power domain events to manage controller state
>   transitions to/from D3.
> - Coordination of the `non_sticky` reset during power state
>   transitions, asserting it on D3 entry and deasserting on D0 entry
>   in hibernation scenario.
> - Handling of high-speed and super-speed PME interrupts
>   that are generated by remote wakeup during hibernation.
>
> Co-developed-by: Joy Chakraborty <joychakr@...gle.com>
> Signed-off-by: Joy Chakraborty <joychakr@...gle.com>
> Co-developed-by: Naveen Kumar <mnkumar@...gle.com>
> Signed-off-by: Naveen Kumar <mnkumar@...gle.com>
> Signed-off-by: Roy Luo <royluo@...gle.com>
> ---
>  drivers/usb/dwc3/Kconfig       |  13 +
>  drivers/usb/dwc3/Makefile      |   1 +
>  drivers/usb/dwc3/dwc3-google.c | 628 +++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 642 insertions(+)
>
> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
> index 4925d15084f816d3ff92059b476ebcc799b56b51..f58c70dabf108878cbefe0abea88572d9ae81e26 100644
> --- a/drivers/usb/dwc3/Kconfig
> +++ b/drivers/usb/dwc3/Kconfig
> @@ -200,4 +200,17 @@ config USB_DWC3_GENERIC_PLAT
>           the dwc3 child node in the device tree.
>           Say 'Y' or 'M' here if your platform integrates DWC3 in a similar way.
>
> +config USB_DWC3_GOOGLE
> +       tristate "Google Platform"
> +       depends on COMPILE_TEST
> +       depends on OF && COMMON_CLK && RESET_CONTROLLER
> +       help
> +         Support the DesignWare Core USB3 IP found on Google Tensor
> +         SoCs, starting with the G5 generation. This driver includes

consider adding: (Laguna)

> +         support for hibernation in host mode.
> +         Say 'Y' or 'M' if you have one such device.
> +
> +         To compile this driver as a module, choose M here: the
> +         module will be called dwc3-google.ko.
> +
>  endif
> diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
> index 96469e48ff9d189cc8d0b65e65424eae2158bcfe..cf1cd408d938b3ac26d58b9be7fcc5af3ee82660 100644
> --- a/drivers/usb/dwc3/Makefile
> +++ b/drivers/usb/dwc3/Makefile
> @@ -58,3 +58,4 @@ obj-$(CONFIG_USB_DWC3_XILINX)         += dwc3-xilinx.o
>  obj-$(CONFIG_USB_DWC3_OCTEON)          += dwc3-octeon.o
>  obj-$(CONFIG_USB_DWC3_RTK)             += dwc3-rtk.o
>  obj-$(CONFIG_USB_DWC3_GENERIC_PLAT)    += dwc3-generic-plat.o
> +obj-$(CONFIG_USB_DWC3_GOOGLE)          += dwc3-google.o
> diff --git a/drivers/usb/dwc3/dwc3-google.c b/drivers/usb/dwc3/dwc3-google.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..53e04a5409d8a11eb025b0f5cd351cb1b33281ab
> --- /dev/null
> +++ b/drivers/usb/dwc3/dwc3-google.c
> @@ -0,0 +1,628 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dwc3-google.c - Google DWC3 Specific Glue Layer
> + *
> + * Copyright (c) 2025, Google LLC
> + * Author: Roy Luo <royluo@...gle.com>
> + */
> +
> +#include <linux/of.h>
> +#include <linux/bitfield.h>
> +#include <linux/irq.h>
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/kernel.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +#include <linux/pm_domain.h>
> +#include <linux/iopoll.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>

Please sort the headers alphabetically. It helps avoid duplicates and
is easier when adding new headers.

Also can you add this file, and the bindings patch to the Tensor SoC
MAINTAINERS entry, so it's easier to review future patches?

With those nits  addressed:
Reviewed-by: Peter Griffin <peter.griffin@...aro.org>

regards,

Peter.