linux-kernel - Re: [PATCH v3 1/3] clk: qcom: rpmh: Add support for Kaanapali rpmh clocks

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Message-ID: <ykiqrdylblbfgozswsogqtiqj3tdbjrk77kunllqfwf6dhhwrl@tmcnamk55yh3>
Date: Tue, 25 Nov 2025 20:25:43 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Taniya Das <taniya.das@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Ajit Pandey <ajit.pandey@....qualcomm.com>,
        Imran Shaik <imran.shaik@....qualcomm.com>,
        Jagadeesh Kona <jagadeesh.kona@....qualcomm.com>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] clk: qcom: rpmh: Add support for Kaanapali rpmh
 clocks

On Tue, Nov 25, 2025 at 11:45:23PM +0530, Taniya Das wrote:
> 
> 
> On 11/22/2025 3:30 PM, Taniya Das wrote:
> > 
> > 
> > On 11/22/2025 2:10 AM, Dmitry Baryshkov wrote:
> >> On Fri, Nov 21, 2025 at 11:26:27PM +0530, Taniya Das wrote:
> >>> Add the RPMH clocks present in Kaanapali SoC.
> >>>
> >>> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
> >>> ---
> >>>  drivers/clk/qcom/clk-rpmh.c | 41 +++++++++++++++++++++++++++++++++++++++++
> >>>  1 file changed, 41 insertions(+)
> >>>
> >>> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> >>> index 1a98b3a0c528c24b600326e6b951b2edb6dcadd7..c3d923a829f16f5a73ea148aca231a0d61d3396d 100644
> >>> --- a/drivers/clk/qcom/clk-rpmh.c
> >>> +++ b/drivers/clk/qcom/clk-rpmh.c
> >>> @@ -395,6 +395,18 @@ DEFINE_CLK_RPMH_VRM(clk4, _a, "C4A_E0", 1);
> >>>  DEFINE_CLK_RPMH_VRM(clk5, _a, "C5A_E0", 1);
> >>>  DEFINE_CLK_RPMH_VRM(clk8, _a, "C8A_E0", 1);
> >>>  
> >>> +DEFINE_CLK_RPMH_VRM(clk1, _a1_e0, "C1A_E0", 1);
> >>> +DEFINE_CLK_RPMH_VRM(clk2, _a1_e0, "C2A_E0", 1);
> >>
> >> This got better, but not enough. Why do we have now clk[12]_a1_e0, but
> >> clk[3458]_a, describing the same kind of resources?
> > 
> > I am going to fix those as Dmitry.
> > 
> 
> Dmitry, I have fixed this on Glymur to ensure to use "div" and "e0"
> https://lore.kernel.org/lkml/20251125-glymur_rpmhcc_fix-v1-1-60081b3cce7f@oss.qualcomm.com/T/#u

The patch should have been a part of this series. It makes little sense
on its own.

> 
> >>> +
> >>> +DEFINE_CLK_RPMH_VRM(clk3, _a2_e0, "C3A_E0", 2);
> >>> +DEFINE_CLK_RPMH_VRM(clk4, _a2_e0, "C4A_E0", 2);
> >>> +DEFINE_CLK_RPMH_VRM(clk5, _a2_e0, "C5A_E0", 2);
> >>> +DEFINE_CLK_RPMH_VRM(clk6, _a2_e0, "C6A_E0", 2);
> >>> +DEFINE_CLK_RPMH_VRM(clk7, _a2_e0, "C7A_E0", 2);
> >>> +DEFINE_CLK_RPMH_VRM(clk8, _a2_e0, "C8A_E0", 2);
> >>> +
> >>> +DEFINE_CLK_RPMH_VRM(clk11, _a4_e0, "C11A_E0", 4);
> >>> +
> >>>  DEFINE_CLK_RPMH_BCM(ce, "CE0");
> >>>  DEFINE_CLK_RPMH_BCM(hwkm, "HK0");
> >>>  DEFINE_CLK_RPMH_BCM(ipa, "IP0");
> >>
> > 
> 
> -- 
> Thanks,
> Taniya Das
> 

-- 
With best wishes
Dmitry