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Message-ID: <CAPDyKFpyCHvnGQUrdMxSmksd2hQtxrfwcWKiQTz4Eu9=tyXvGQ@mail.gmail.com>
Date: Tue, 25 Nov 2025 14:00:19 +0100
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Sarthak Garg <sarthak.garg@....qualcomm.com>
Cc: Adrian Hunter <adrian.hunter@...el.com>, linux-arm-msm@...r.kernel.org, 
	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org, 
	quic_nguyenb@...cinc.com, quic_rampraka@...cinc.com, 
	quic_pragalla@...cinc.com, quic_sayalil@...cinc.com, 
	quic_nitirawa@...cinc.com, quic_bhaskarv@...cinc.com, kernel@....qualcomm.com
Subject: Re: [PATCH V2] mmc: sdhci-msm: Avoid early clock doubling during
 HS400 transition

On Mon, 17 Nov 2025 at 11:55, Ulf Hansson <ulf.hansson@...aro.org> wrote:
>
> On Fri, 14 Nov 2025 at 09:28, Sarthak Garg
> <sarthak.garg@....qualcomm.com> wrote:
> >
> > According to the hardware programming guide, the clock frequency must
> > remain below 52MHz during the transition to HS400 mode.
> >
> > However,in the current implementation, the timing is set to HS400 (a
> > DDR mode) before adjusting the clock. This causes the clock to double
> > prematurely to 104MHz during the transition phase, violating the
> > specification and potentially resulting in CRC errors or CMD timeouts.
> >
> > This change ensures that clock doubling is avoided during intermediate
> > transitions and is applied only when the card requires a 200MHz clock
> > for HS400 operation.
> >
> > Signed-off-by: Sarthak Garg <sarthak.garg@....qualcomm.com>
>
> It sounds to me that we should add a fixes/stable tag for this, right?

I applied this for next and added a stable tag, please let me know if
you prefer something different.

[...]

Kind regards
Uffe

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