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Message-ID: <15a6e162-2b1f-4d47-9bf2-aea1b7523685@amd.com>
Date: Wed, 26 Nov 2025 11:12:42 +0530
From: Sandipan Das <sandipan.das@....com>
To: Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Benjamin Gray <bgray@...ux.ibm.com>, Caleb Biggers
 <caleb.biggers@...el.com>, Edward Baker <edward.baker@...el.com>,
 Ingo Molnar <mingo@...hat.com>, James Clark <james.clark@...aro.org>,
 Jing Zhang <renyu.zj@...ux.alibaba.com>, Jiri Olsa <jolsa@...nel.org>,
 John Garry <john.g.garry@...cle.com>, Leo Yan <leo.yan@....com>,
 Namhyung Kim <namhyung@...nel.org>, Perry Taylor <perry.taylor@...el.com>,
 Peter Zijlstra <peterz@...radead.org>, Samantha Alt
 <samantha.alt@...el.com>, Thomas Falcon <thomas.falcon@...el.com>,
 Weilin Wang <weilin.wang@...el.com>, Xu Yang <xu.yang_2@....com>,
 linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org
Subject: Re: [PATCH v8 27/52] perf jevents: Add uop cache hit/miss rates for
 AMD

On 11/13/2025 8:50 AM, Ian Rogers wrote:
> Add metrics giving ratio of uop cache hits to misses.
> 
> Signed-off-by: Ian Rogers <irogers@...gle.com>
> ---
>  tools/perf/pmu-events/amd_metrics.py | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/tools/perf/pmu-events/amd_metrics.py b/tools/perf/pmu-events/amd_metrics.py
> index da50337557f5..b2e3e2883022 100755
> --- a/tools/perf/pmu-events/amd_metrics.py
> +++ b/tools/perf/pmu-events/amd_metrics.py
> @@ -584,6 +584,23 @@ def AmdSwpf() -> Optional[MetricGroup]:
>                         description="Software prefetch breakdown (CCX L3 = L3 of current thread, Loc CCX = CCX cache on some socket)")
>  
>  
> +def AmdUopCache() -> Optional[MetricGroup]:
> +    try:
> +        op_cache_hit = Event("op_cache_hit_miss.op_cache_hit")
> +        op_cache_miss = Event("op_cache_hit_miss.op_cache_miss")
> +    except:
> +        return None
> +    op_cache_total = op_cache_hit + op_cache_miss
> +    return MetricGroup("lpm_uop_cache", [
> +        Metric("lpm_uop_cache_hit_ratio", "Uop cache full or partial hits rate",
> +               d_ratio(op_cache_hit, op_cache_total),
> +               "100%"),
> +        Metric("lpm_uop_cache_miss_ratio", "Uop cache misses rate",
> +               d_ratio(op_cache_miss, op_cache_total),
> +               "100%"),
> +    ], description="Micro-op (uop) hit and miss rates.")
> +
> +
>  def AmdUpc() -> Metric:
>      ops = Event("ex_ret_ops", "ex_ret_cops")
>      upc = d_ratio(ops, smt_cycles)
> @@ -675,6 +692,7 @@ def main() -> None:
>          AmdLdSt(),
>          AmdHwpf(),
>          AmdSwpf(),
> +        AmdUopCache(),
>          AmdUpc(),
>          Idle(),
>          Rapl(),

Reviewed-by: Sandipan Das <sandipan.das@....com>


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