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Message-ID: <9d3e0fc0-316d-4956-9e9b-3bdd3d08a8af@oss.qualcomm.com>
Date: Wed, 26 Nov 2025 14:56:11 +0530
From: Taniya Das <taniya.das@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>
Cc: Ajit Pandey <ajit.pandey@....qualcomm.com>,
        Imran Shaik <imran.shaik@....qualcomm.com>,
        Jagadeesh Kona <jagadeesh.kona@....qualcomm.com>,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/3] clk: qcom: Add TCSR clock driver for Kaanapali



On 11/22/2025 7:25 PM, Konrad Dybcio wrote:
> On 11/21/25 6:56 PM, Taniya Das wrote:
>> Add the TCSR clock controller that provides the refclks on Kaanapali
>> platform for PCIe, USB and UFS subsystems.
>>
>> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
>> ---
> 
> [...]
> 
>> +static const struct regmap_config tcsr_cc_kaanapali_regmap_config = {
>> +	.reg_bits = 32,
>> +	.reg_stride = 4,
>> +	.val_bits = 32,
>> +	.max_register = 0x2f000,
> 
> 0x3d000
> 

Will be taken care in the next patch.


-- 
Thanks,
Taniya Das


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