linux-kernel - RE: [EXT] Re: [PATCH 5/6] spi: imx: support dynamic burst length for ECSPI DMA mode

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Message-ID:
 <VI2PR04MB11147811EAD5EE9668B7A9B57E8DFA@VI2PR04MB11147.eurprd04.prod.outlook.com>
Date: Thu, 27 Nov 2025 02:36:40 +0000
From: Carlos Song <carlos.song@....com>
To: Marc Kleine-Budde <mkl@...gutronix.de>
CC: "broonie@...nel.org" <broonie@...nel.org>, Frank Li <frank.li@....com>,
	"hawnguo@...nel.org" <hawnguo@...nel.org>, "s.hauer@...gutronix.de"
	<s.hauer@...gutronix.de>, "kernel@...gutronix.de" <kernel@...gutronix.de>,
	"festevam@...il.com" <festevam@...il.com>, "imx@...ts.linux.dev"
	<imx@...ts.linux.dev>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-spi@...r.kernel.org"
	<linux-spi@...r.kernel.org>
Subject: RE: [EXT] Re: [PATCH 5/6] spi: imx: support dynamic burst length for
 ECSPI DMA mode

> -----Original Message-----
> From: Marc Kleine-Budde <mkl@...gutronix.de>
> Sent: Wednesday, November 26, 2025 8:36 PM
> To: Carlos Song <carlos.song@....com>
> Cc: broonie@...nel.org; Frank Li <frank.li@....com>; hawnguo@...nel.org;
> s.hauer@...gutronix.de; kernel@...gutronix.de; festevam@...il.com;
> imx@...ts.linux.dev; linux-kernel@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; linux-spi@...r.kernel.org
> Subject: [EXT] Re: [PATCH 5/6] spi: imx: support dynamic burst length for ECSPI
> DMA mode
> 
> On 26.11.2025 11:17:41, Carlos Song wrote:
> >
> >
> > > -----Original Message-----
> > > From: Marc Kleine-Budde <mkl@...gutronix.de>
> > > Sent: Wednesday, November 26, 2025 4:31 PM
> > > To: Carlos Song <carlos.song@....com>
> > > Cc: broonie@...nel.org; Frank Li <frank.li@....com>;
> > > hawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> > > festevam@...il.com; imx@...ts.linux.dev;
> > > linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> > > linux-spi@...r.kernel.org
> > > Subject: [EXT] Re: [PATCH 5/6] spi: imx: support dynamic burst
> > > length for ECSPI DMA mode
> > >
> > > On 26.11.2025 07:42:36, Carlos Song wrote:
> > >
> > > [...]
> > > > For example len is 512 *3 + 511. So first transfer using
> > > > BURST_LENGTH = 512 bytes(auto update 3 times), DMA transfer len =
> > > > 512 *3, second package BURST_LENGTH = 511 bytes, DMA transfer len
> > > > = 511.(If here we use 512 bytes as BURST_LENGTH, SPI will shift
> > > > out/in extra bits, it previous isn't acceptable!)
> > >
> > > What happens if you keep the Burst Length at 512 and only transfer
> > > 511 bytes with the DMA engine?
> > >
> >
> > Sorry for missing one question:
> > BURST_LENGTH = 511, ECSPI will shift out 511 bytes in bus.
> > BURST_LENGTH = 512, ECSPI will shift out the last one word all bit in 32 bits
> FIFO.
> > So ECSPI will shift out 512 bytes include 8-bits zero bytes in bus.
> 
> Why was the tail transfer not needed before your patch?
> 
> Is because you configure buswidth to DMA_SLAVE_BUSWIDTH_4_BYTES
> unconditionally on !word_delay mode. What happens if you always use
> DMA_SLAVE_BUSWIDTH_1_BYTES?
> 

Yes. DMA_SLAVE_BUSWIDTH_4_BYTES make this. I can not use DMA_SLAVE_BUSWIDTH_1_BYTES.
When BUTST_LENGTH is set >= 4 bytes, SPI always handle whole word size(always 32 bits) as RM shows.
"
Burst Length. This field defines the length of a SPI burst to be transferred. The Chip Select (SS) will
remain asserted until all bits in a SPI burst are shifted out. A maximum of 2^12 bits can be transferred in a
single SPI burst.
In master mode, it controls the number of bits per SPI burst. Since the shift register always loads 32-bit
data from transmit FIFO, only the n least-significant (n = BURST LENGTH + 1) will be shifted out. The
remaining bits will be ignored.
Number of Valid Bits in a SPI burst.
0x000 A SPI burst contains the 1 LSB in a word.
0x001 A SPI burst contains the 2 LSB in a word.
0x002 A SPI burst contains the 3 LSB in a word.
...
0x01F A SPI burst contains all 32 bits in a word.
0x020 A SPI burst contains the 1 LSB in first word and all 32 bits in second word.
0x021 A SPI burst contains the 2 LSB in first word and all 32 bits in second word.
...
0xFFE A SPI burst contains the 31 LSB in first word and 2^7 -1 words.
0xFFF A SPI burst contains 2^7 words.
"
For example, for TX, xfer->len = 4, BURST_LENGTRH = 4 bytes, DMA_SLAVE_BUSWIDTH_1_BYTES, DMA will fill one bytes in 32bits FIFO but SPI will shift one whole 32bits word in FIFO (3 zero bytes+ 1 bytes) + one word(3 zero bytes+ 1 bytes) +one word+ one word. Actually 16 bytes, not 4 bytes. That is wrong.

You can check previous code, it use BURST_LENTH to maintain the real bits count.
DMA_SLAVE_BUSWIDTH_1_BYTES: BBURST_LENGTH = 1 bytes
DMA_SLAVE_BUSWIDTH_2_BYTES: BBURST_LENGTH = 2 bytes
DMA_SLAVE_BUSWIDTH_4_BYTES: BBURST_LENGTH = 4 bytes

Carlos

> Marc
> 
> --
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