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Message-ID: <CAMuHMdV3GP6o=3tRZOQ5gmh7ty80KO15yjymDUzzwB75dv9K3g@mail.gmail.com>
Date: Fri, 28 Nov 2025 14:04:46 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Biju Das <biju.das.jz@...renesas.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, 
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>, Biju Das <biju.das.au@...il.com>
Subject: Re: [PATCH 17/19] arm64: dts: renesas: r9a09g047: Add RSCI nodes

Hi Biju,

On Mon, 27 Oct 2025 at 16:47, Biju Das <biju.das.jz@...renesas.com> wrote:
> Add RSCI nodes to RZ/G3E ("R9A09G047") SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> @@ -823,6 +823,196 @@ i2c8: i2c@...01000 {
>                         status = "disabled";
>                 };
>
> +               rsci0: serial@...00c00 {
> +                       compatible = "renesas,r9a09g047-rscif";

"renesas,r9a09g047-rsci", as per the updated DT bindings.

> +                       reg = <0 0x12800c00 0 0x400>;
> +                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 115 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>,
> +                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "eri", "rxi", "txi", "tei";

Missing "aed" and "bfd" interrupts, as per to-be-updated DT bindings.

> +                       clocks = <&cpg CPG_MOD 93>, <&cpg CPG_MOD 94>,
> +                                <&cpg CPG_MOD 95>, <&cpg CPG_MOD 96>,
> +                                <&cpg CPG_MOD 97>;
> +                       clock-names = "bus", "tclk", "tclk_div64",
> +                                     "tclk_div16", "tclk_div4";

Third and fifth clock and clock name should be exchanged, as per the
updated DT bindings.

> +                       power-domains = <&cpg>;
> +                       resets = <&cpg 129>, <&cpg 130>;

Please use hexadecimal numbers for module clocks and resets, for
easier matching with the documentation.

> +                       reset-names = "presetn", "tresetn";
> +                       status = "disabled";
> +               };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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