linux-kernel - Re: [PATCH 19/19] arm64: dts: renesas: renesas-smarc2: Enable rsci{2,4,9} nodes

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Message-ID: <CAMuHMdVWMMaUV92mGF8u4E+FsyKQ5_JbQhm9pbUwzSr58ZgNHw@mail.gmail.com>
Date: Fri, 28 Nov 2025 14:41:05 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Biju Das <biju.das.jz@...renesas.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, 
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>, Biju Das <biju.das.au@...il.com>
Subject: Re: [PATCH 19/19] arm64: dts: renesas: renesas-smarc2: Enable
 rsci{2,4,9} nodes

Hi Biju,

On Mon, 27 Oct 2025 at 16:47, Biju Das <biju.das.jz@...renesas.com> wrote:
> Enable device rsci{2,4,9} nodes for the RZ SMARC Carrier-II Board.
>
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
> @@ -38,6 +38,9 @@ / {
>
>         aliases {
>                 i2c0 = &i2c0;
> +               serial0 = &rsci4;
> +               serial1 = &rsci9;
> +               serial2 = &rsci2;
>                 serial3 = &scif0;
>                 mmc1 = &sdhi1;
>         };
> @@ -141,6 +144,26 @@ nmi_pins: nmi {
>                 input-schmitt-enable;
>         };
>
> +       rsci2_pins: rsci2 {
> +               pinmux = <RZG3E_PORT_PINMUX(1, 1, 1)>, /* SER2_TX */
> +                        <RZG3E_PORT_PINMUX(1, 0, 1)>, /* SER2_RX */

Why not order by port number?

> +                        <RZG3E_PORT_PINMUX(1, 2, 6)>, /* SER2_CTS# */
> +                        <RZG3E_PORT_PINMUX(1, 3, 1)>; /* SER2_RTS# */

These comments reflect the board signals?  Usually we put the pin
functions ("TXD2", "RXD2", "CTS2N", "RTS2N") in the comments.

> +               bias-pull-up;
> +       };
> +
> +       rsci4_pins: rsci4 {
> +               pinmux = <RZG3E_PORT_PINMUX(7, 7, 5)>, /* SER0_TX */
> +                        <RZG3E_PORT_PINMUX(7, 6, 5)>; /* SER0_RX */

Why not order by port number?

Pin functions are "TXD4" and "RXD4".

CTS4N and RTS4N seem to be wired, too?

> +               bias-pull-up;
> +       };
> +
> +       rsci9_pins: rsci9 {
> +               pinmux = <RZG3E_PORT_PINMUX(8, 3, 5)>, /* SER1_TX */
> +                        <RZG3E_PORT_PINMUX(8, 2, 5)>; /* SER1_RX */

Why not order by port number?

Pin functions are "TXD9" and "RXD9".

> +               bias-pull-up;
> +       };
> +
>         scif_pins: scif {
>                 pins = "SCIF_TXD", "SCIF_RXD";
>                 renesas,output-impedance = <1>;
> @@ -172,6 +195,23 @@ sd1-data {
>         };
>  };
>
> +&rsci2 {
> +       pinctrl-0 = <&rsci2_pins>;
> +       pinctrl-names = "default";
> +
> +       uart-has-rtscts;
> +};

Shouldn't this be wrapped inside an #ifdef controlled by new defines
SW_SER2_EN and SW_SER0_PMOD?

> +
> +&rsci4 {
> +       pinctrl-0 = <&rsci4_pins>;
> +       pinctrl-names = "default";

uart-has-rtscts?

> +};

Shouldn't this be wrapped inside an #ifdef controlled by SW_LCD_EN?
The port seems to be available irrespective of the setting of
SW_SER0_PMOD, which merely controls routing to either the PMOD or the
M.2 connector.

> +
> +&rsci9 {
> +       pinctrl-0 = <&rsci9_pins>;
> +       pinctrl-names = "default";
> +};
> +
>  &scif0 {
>         pinctrl-0 = <&scif_pins>;
>         pinctrl-names = "default";
> diff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> index a296c2c1c7ab..305215cdaeb3 100644
> --- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> +++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
> @@ -89,6 +89,18 @@ &i2c0 {
>         clock-frequency = <400000>;
>  };
>
> +&rsci2 {
> +       status = "okay";
> +};
> +
> +&rsci4 {
> +       status = "okay";
> +};
> +
> +&rsci9 {
> +       status = "okay";
> +};

Given "[PATCH 18/19] arm64: dts: renesas: renesas-smarc2: Move aliases
to board DTS" because RZ/G3S does not have RSCI interfaces, why are
these added here instead of to r9a09g047e57-smarc.dts?

> +
>  &scif0 {
>         status = "okay";
>  };

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds