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Message-ID: <CAHp75VdGxSpfiga71UsQip5SGj06v+hxbxayrWYd9eG5QLfSug@mail.gmail.com>
Date: Mon, 1 Dec 2025 03:43:31 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Crescent Hsieh <crescentcy.hsieh@...a.com>
Cc: gregkh@...uxfoundation.org, jirislaby@...nel.org,
ilpo.jarvinen@...ux.intel.com, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org
Subject: Re: [PATCH v1 15/31] serial: 8250_mxpcie: optimize Rx using
memory-mapped FIFO access
On Sun, Nov 30, 2025 at 12:44 PM Crescent Hsieh
<crescentcy.hsieh@...a.com> wrote:
>
> Add mxpcie8250_rx_chars() to retrieve data from the Rx FIFO via
> memory-mapped FIFO access, using the UART-specific FIFO byte counter
> and FIFO memory region.
>
> This avoids per-byte I/O reads through serial_in(), improving receive
> throughput on Moxa PCIe UART devices. For break and error conditions,
> the handler falls back to serial8250_rx_chars() to retain standard
> error handling logic.
...
> +static void mxpcie8250_rx_chars(struct uart_8250_port *up)
> +{
> + struct uart_port *port = &up->port;
> + struct tty_port *tport = &port->state->port;
> + int recv_room, gdl, i;
> + u8 buf[MOXA_PUART_FIFO_SIZE];
> +
> + recv_room = tty_buffer_request_room(tport, port->fifosize);
> +
Unneeded blank line
> + if (recv_room) {
if (!recv_room)
return;
> + gdl = serial_in(up, MOXA_PUART_RX_FIFO_CNT);
> +
Unneeded blank line.
> + if (gdl > recv_room)
> + gdl = recv_room;
> + for (i = 0; i < gdl; ++i)
> + buf[i] = *(port->membase + MOXA_PUART_RX_FIFO_MEM + i);
> +
> + port->icount.rx += gdl;
> + tty_insert_flip_string(tport, buf, gdl);
> + tty_flip_buffer_push(tport);
> + }
> +}
...
> - if (lsr & (UART_LSR_DR | UART_LSR_BI) && !skip_rx)
> - lsr = serial8250_rx_chars(up, lsr);
> + if (lsr & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
> + if (lsr & UART_LSR_BRK_ERROR_BITS)
> + lsr = serial8250_rx_chars(up, lsr);
> + else
> + mxpcie8250_rx_chars(up);
> + }
And again, please try not to modify the code you just added in the
previous changes.
--
With Best Regards,
Andy Shevchenko
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