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Message-ID: <5221ac0c-b59d-4f7b-ae4d-acd7dab47780@oss.nxp.com>
Date: Mon, 1 Dec 2025 09:43:55 +0800
From: "Ming Qian(OSS)" <ming.qian@....nxp.com>
To: Lucas Stach <l.stach@...gutronix.de>, linux-media@...r.kernel.org
Cc: mchehab@...nel.org, hverkuil-cisco@...all.nl, nicolas@...fresne.ca,
benjamin.gaignard@...labora.com, p.zabel@...gutronix.de,
sebastian.fricke@...labora.com, shawnguo@...nel.org, ulf.hansson@...aro.org,
s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
linux-imx@....com, Frank.li@....com, peng.fan@....com, eagle.zhou@....com,
imx@...ts.linux.dev, linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 1/2] pmdomain: imx8m-blk-ctrl: Remove separate rst and
clk mask for 8mq vpu
Hi Lucas,
On 11/28/2025 6:38 PM, Lucas Stach wrote:
> Am Freitag, dem 28.11.2025 um 10:51 +0800 schrieb
> ming.qian@....nxp.com:
>> From: Ming Qian <ming.qian@....nxp.com>
>>
>> For i.MX8MQ platform, the ADB in the VPUMIX domain has no separate reset
>> and clock enable bits, but is ungated and reset together with the VPUs.
>> So we can't reset G1 or G2 separately, it may led to the system hang.
>> Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data.
>> Let imx8mq_vpu_power_notifier() do really vpu reset.
>>
>> Fixes: 608d7c325e85 ("soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl")
>> Signed-off-by: Ming Qian <ming.qian@....nxp.com>
>> Reviewed-by: Benjamin Gaignard <benjamin.gaignard@...labora.com>
>> ---
>> v2
>> - Update commit message
>>
>> drivers/pmdomain/imx/imx8m-blk-ctrl.c | 4 ----
>> 1 file changed, 4 deletions(-)
>>
>> diff --git a/drivers/pmdomain/imx/imx8m-blk-ctrl.c b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
>> index 5c83e5599f1e..1f07ff041295 100644
>> --- a/drivers/pmdomain/imx/imx8m-blk-ctrl.c
>> +++ b/drivers/pmdomain/imx/imx8m-blk-ctrl.c
>> @@ -852,16 +852,12 @@ static const struct imx8m_blk_ctrl_domain_data imx8mq_vpu_blk_ctl_domain_data[]
>> .clk_names = (const char *[]){ "g1", },
>> .num_clks = 1,
>> .gpc_name = "g1",
>> - .rst_mask = BIT(1),
>> - .clk_mask = BIT(1),
>
> Change itself looks okay to me. Can you please leave a small comment
> here and for the G2 domain to document why the clk and reset bits are
> removed, so one doesn't need to dig into the git history when reading
> the driver code?
>
> Regards,
> Lucas
Sure, will do in v3
Regards,
Ming
>
>> },
>> [IMX8MQ_VPUBLK_PD_G2] = {
>> .name = "vpublk-g2",
>> .clk_names = (const char *[]){ "g2", },
>> .num_clks = 1,
>> .gpc_name = "g2",
>> - .rst_mask = BIT(0),
>> - .clk_mask = BIT(0),
>> },
>> };
>>
>
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