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Message-ID: <aS2myhp8asABFyLt@stanley.mountain>
Date: Mon, 1 Dec 2025 17:31:38 +0300
From: Dan Carpenter <dan.carpenter@...aro.org>
To: Chester Lin <chester62515@...il.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
Conor Dooley <conor+dt@...nel.org>,
"David S. Miller" <davem@...emloft.net>, devicetree@...r.kernel.org,
Eric Dumazet <edumazet@...gle.com>,
Fabio Estevam <festevam@...il.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
imx@...ts.linux.dev, Jakub Kicinski <kuba@...nel.org>,
Jan Petrous <jan.petrous@....nxp.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Lee Jones <lee@...nel.org>, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
Matthias Brugger <mbrugger@...e.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
NXP S32 Linux Team <s32@....com>, Paolo Abeni <pabeni@...hat.com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Rob Herring <robh@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>, linaro-s32@...aro.org
Subject: Re: [PATCH 0/4] s32g: Use a syscon for GPR
On Mon, Dec 01, 2025 at 04:08:14PM +0300, Dan Carpenter wrote:
> *** BLURB HERE ***
>
Sorry, I obviously meant to write a message here.
The s32g devices have a GPR register region which could be accessed
via a syscon. Currently only the stmmac/dwmac-s32.c uses anything
from there and we just add a line to the device tree to access
that GMAC_0_CTRL_STS register:
reg = <0x4033c000 0x2000>, /* gmac IP */
<0x4007c004 0x4>; /* GMAC_0_CTRL_STS */
But it would be better to have a syscon instead of adding each
register to the device tree like this.
We still have to maintain backwards compatibility to this format,
of course.
regards,
dan carpenter
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