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Message-ID: <176488419217.2206248.9983976146883123306.robh@kernel.org>
Date: Thu, 4 Dec 2025 15:36:32 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
Cc: linux-mtd@...ts.infradead.org, Richard Weinberger <richard@....at>,
dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org,
Dinh Nguyen <dinguyen@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Conor Dooley <conor+dt@...nel.org>,
Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Vinod Koul <vkoul@...nel.org>, devicetree@...r.kernel.org,
Niravkumar L Rabara <niravkumar.l.rabara@...el.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>
Subject: Re: [PATCH v2 1/3] dt-bindings: mtd: cdns,hp-nfc: Add dma-coherent
property
On Wed, 03 Dec 2025 07:47:33 +0800, Khairul Anuar Romli wrote:
> The Cadence HP NAND Flash Controller on supports DMA transactions through
> a coherent interconnect. In previous generations SoC (Stratix10 and Agilex)
> the interconnect was non-coherent, hence there is no need for dma-coherent
> property to be presence. In Agilex 5, the architecture has changed. It
> introduced a coherent interconnect that supports cache-coherent DMA.
>
> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@...era.com>
> ---
> Changes in v2:
> - Rephrase commit message to describe why the property is needed now
> and was not needed previously.
> - Remove redundant statement.
> ---
> Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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