linux-kernel - Re: [PATCH v4 4/6] riscv: dts: starfive: Add common board dtsi for VisionFive 2 Lite variants

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Message-ID: <72318f65-a360-4be0-baee-7f94b7cbf949@freeshell.de>
Date: Thu, 4 Dec 2025 23:30:19 -0800
From: E Shattow <e@...eshell.de>
To: Maud Spierings <maud_spierings@...mail.com>, linux.amoon@...il.com
Cc: aou@...s.berkeley.edu, bhelgaas@...gle.com, broonie@...nel.org,
 conor+dt@...nel.org, devicetree@...r.kernel.org,
 emil.renner.berthing@...onical.com, hal.feng@...rfivetech.com,
 heinrich.schuchardt@...onical.com, krzk+dt@...nel.org,
 kwilczynski@...nel.org, lgirdwood@...il.com, linux-kernel@...r.kernel.org,
 linux-pci@...r.kernel.org, linux-riscv@...ts.infradead.org,
 lpieralisi@...nel.org, mani@...nel.org, palmer@...belt.com, pjw@...nel.org,
 rafael@...nel.org, robh@...nel.org, viresh.kumar@...aro.org,
 sandie.cao@...pcomputing.io
Subject: Re: [PATCH v4 4/6] riscv: dts: starfive: Add common board dtsi for
 VisionFive 2 Lite variants



On 12/4/25 23:23, Maud Spierings wrote:
>>
>> Hi Hal,
>>
>> On Tue, 25 Nov 2025 at 13:27, Hal Feng <hal.feng@...rfivetech.com> wrote:
>>>
>>> Add a common board dtsi for use by VisionFive 2 Lite and
>>> VisionFive 2 Lite eMMC.
>>>
>>> Acked-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
>>> Tested-by: Matthias Brugger <mbrugger@...e.com>
>>> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
>>> ---
>>>  .../jh7110-starfive-visionfive-2-lite.dtsi    | 161 ++++++++++++++++++
>>>  1 file changed, 161 insertions(+)
>>>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-
>>> visionfive-2-lite.dtsi
>>>
>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-
>>> visionfive-2-lite.dtsi b/arch/riscv/boot/dts/starfive/jh7110-
>>> starfive-visionfive-2-lite.dtsi
>>> new file mode 100644
>>> index 000000000000..f8797a666dbf
>>> --- /dev/null
>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-
>>> lite.dtsi
>>> @@ -0,0 +1,161 @@
>>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>>> +/*
>>> + * Copyright (C) 2025 StarFive Technology Co., Ltd.
>>> + * Copyright (C) 2025 Hal Feng <hal.feng@...rfivetech.com>
>>> + */
>>> +
>>> +/dts-v1/;
>>> +#include "jh7110-common.dtsi"
>>> +
>>> +/ {
>>> +       vcc_3v3_pcie: regulator-vcc-3v3-pcie {
>>> +               compatible = "regulator-fixed";
>>> +               enable-active-high;
>>> +               gpio = <&sysgpio 27 GPIO_ACTIVE_HIGH>;
>>> +               regulator-name = "vcc_3v3_pcie";
>>> +               regulator-min-microvolt = <3300000>;
>>> +               regulator-max-microvolt = <3300000>;
>>> +       };
>>> +};
>>
>> The vcc_3v3_pcie regulator node is common to all JH7110 development
>> boards.
>> and it is enabled through the PWREN_H signal (PCIE0_PWREN_H_GPIO32).
>>
>> VisionFive 2 Product Design Schematics below
>> [1] https://doc-en.rvspace.org/VisionFive2/PDF/
>> SCH_RV002_V1.2A_20221216.pdf
>>
>> Mars_Hardware_Schematics
>> [2] https://github.com/milkv-mars/mars-files/blob/main/
>> Mars_Hardware_Schematics/Milk-V_Mars_SCH_V1.21_2024-0510.pdf
>>
> 
> I'm not sure if this also holds true for the deepcomputing fml13v01,
> sadly as far as I know there is no schematics available for that.
> 
> the downstream dts [3] doesn't contain any evidence of it, neither does
> upstream.
> 
> I wouldn't be surprised if it is there but just not present in the dts,
> but it may be nice to get some feedback from someone at deepcomputing.
> 
> adding Sandie Cao who did some of the upstreaming work.
> 
> Link: https://github.com/DC-DeepComputing/fml13v01-linux/
> blob/97c64fe2832b6826914b6da7aa4febcdd4d3d444/arch/riscv/boot/dts/
> starfive/jh7110-deepcomputing-fml13v01.dts#L416-L432 [3]
> 
> kind regards,
> Maud
> 

I asked (to DeepComputing sales e-mail address) for schematics 28th July
2025, the reply was "There is no plan to public it by now." I also got
some generic response when I asked a technical question about RGPIO3
connection to look at the DeepComputing repo on github.

No schematics and no help to developers.

-E