linux-kernel - [PATCH v6 0/7] Add ASPEED PCIe Root Complex support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID:
 <SEYPR06MB5134D0D5911E3C86D869151E9DA7A@SEYPR06MB5134.apcprd06.prod.outlook.com>
Date: Fri, 5 Dec 2025 00:12:35 +0000
From: Jacky Chou <jacky_chou@...eedtech.com>
To: Rob Herring <robh@...nel.org>
CC: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
	Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au>,
	Bjorn Helgaas <bhelgaas@...gle.com>, Lorenzo Pieralisi
	<lpieralisi@...nel.org>, Krzysztof Wilczyński
	<kwilczynski@...nel.org>, Manivannan Sadhasivam <mani@...nel.org>, Linus
 Walleij <linus.walleij@...aro.org>, Philipp Zabel <p.zabel@...gutronix.de>,
	"linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, Andrew Jeffery <andrew@...id.au>,
	"openbmc@...ts.ozlabs.org" <openbmc@...ts.ozlabs.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: [PATCH v6 0/7] Add ASPEED PCIe Root Complex support

Hi Rob,

Thanks for your comments.

> > Changes in v6:
> > - Refer to pci-cpi-bridge.yaml to update aspeed,ast2600-pcie.yaml and
> >   the pcie node of aspeed-g6.dtsi.
> 
> Where is this? You don't describe the root port and its properties at all now.
> 

May I confirm whether the pcie@8,0 in aspeed-g6.dtsi is not considered the 
root port? From my understanding, that node represents the root port, so I 
want to make sure I'm aligning with your expectation before updating the binding.

Could you help clarify how you would like the root port and its properties to 
be described in the schema?

Thanks,
Jacky