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Message-ID: <51908ef6-f777-4a20-acef-538d9e715790@tuxon.dev>
Date: Sat, 6 Dec 2025 13:03:24 +0200
From: Claudiu Beznea <claudiu.beznea@...on.dev>
To: Horatiu Vultur <horatiu.vultur@...rochip.com>,
 nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: lan966x: Fix the access to the PHYs for pcb8290



On 11/19/25 15:47, Horatiu Vultur wrote:
> The problem is that the MDIO controller can't detect any of the PHYs.
> The reason is that the lan966x is not pulling high the GPIO 53 that is
> connected to the PHYs reset GPIO. Without doing this the PHYs are kept
> in reset. The mdio controller framework has the possiblity to control a

s/possiblity/possibility

I can adjust it while applying

> GPIO to release the reset of the PHYs. So take advantage of this and set
> line to be high before accessing the PHYs.
> 
> Signed-off-by: Horatiu Vultur <horatiu.vultur@...rochip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@...on.dev>

> ---
>  arch/arm/boot/dts/microchip/lan966x-pcb8290.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> index 3b7577e48b467..50bd29572f3ed 100644
> --- a/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> +++ b/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
> @@ -54,6 +54,7 @@ udc_pins: ucd-pins {
>  &mdio0 {
>  	pinctrl-0 = <&miim_a_pins>;
>  	pinctrl-names = "default";
> +	reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
>  	status = "okay";
>  
>  	ext_phy0: ethernet-phy@7 {


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