[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251206162642.5b4a3e9b@jic23-huawei>
Date: Sat, 6 Dec 2025 16:26:42 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Tomas Borquez <tomasborquez13@...il.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>, Michael Hennerich
<Michael.Hennerich@...log.com>, Rob Herring <robh@...nel.org>, Krzysztof
Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Greg
Kroah-Hartman <gregkh@...uxfoundation.org>, David Lechner
<dlechner@...libre.com>, Nuno Sá <nuno.sa@...log.com>, Andy
Shevchenko <andy@...nel.org>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-staging@...ts.linux.dev
Subject: Re: [RFC PATCH 3/3] dt-bindings: iio: add analog devices
ad9832/ad9835
On Fri, 5 Dec 2025 17:27:43 -0300
Tomas Borquez <tomasborquez13@...il.com> wrote:
> Add devicetree binding documentation for the AD9832 and AD9835
> Digital Synthesizer chips.
>
> Signed-off-by: Tomas Borquez <tomasborquez13@...il.com>
Normally we only add a binding as part of the staging graduation
which typically involves a full review of the whole driver (make sure
to disable move detection in git if you send the code moving patch).
Anyhow, we can still give early feedback on this!
Whilst checking the pin mappings I finally noticed this a current source DAC
not a voltage one so all the channel types should be out_altcurrent0_...
Michael, I don't suppose you happen to remember why it is pretending to
be a voltage DAC?
Jonathan
> ---
> .../bindings/iio/frequency/adi,ad9832.yaml | 65 +++++++++++++++++++
> 1 file changed, 65 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/frequency/adi,ad9832.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,ad9832.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,ad9832.yaml
> new file mode 100644
> index 0000000000..f14e054ab2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/frequency/adi,ad9832.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/frequency/adi,ad9832.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD9832/AD9835 Direct Digital Synthesizer
> +
> +maintainers:
> + - Michael Hennerich <michael.hennerich@...log.com>
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad9832
> + - adi,ad9835
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 20000000
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: mclk
> +
> + avdd-supply:
> + description: Analog power supply.
> +
> + dvdd-supply:
> + description: Digital power supply.
There looks to be a REFIN pin (and FS Adjust which is a bit of an oddity)
We probably need to desribe any resistor connected to fs adjust a bit like
a shunt resistor.
See cover letter discussion for the ways the various
inputs could be wired. Some of the recent discussion on tied
GPIOs is also relevant here. I'm not up to date with where that
ended up yet though!
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - avdd-supply
> + - dvdd-supply
> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + dds@0 {
> + compatible = "adi,ad9832";
> + reg = <0>;
> + spi-max-frequency = <20000000>;
> + clocks = <&dds_clk>;
> + clock-names = "mclk";
> + avdd-supply = <&avdd_reg>;
> + dvdd-supply = <&dvdd_reg>;
> + };
> + };
> +...
Powered by blists - more mailing lists