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Message-ID: <20251206193408.GD1219718@nvidia.com>
Date: Sat, 6 Dec 2025 15:34:08 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: will@...nel.org, robin.murphy@....com, joro@...tes.org,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org, skolothumtho@...dia.com,
praan@...gle.com
Subject: Re: [PATCH rc v1 1/4] iommu/arm-smmu-v3: Add ignored bits to fix STE
update sequence
On Fri, Dec 05, 2025 at 04:52:00PM -0800, Nicolin Chen wrote:
> @@ -1106,16 +1115,17 @@ static u8 arm_smmu_entry_qword_diff(struct arm_smmu_entry_writer *writer,
> * allowed to set a bit to 1 if the used function doesn't say it
> * is used.
> */
> - WARN_ON_ONCE(target[i] & ~target_used[i]);
> + WARN_ON_ONCE(target[i] & ~target_used[i] & ~ignored[i]);
>
> /* Bits can change because they are not currently being used */
> - unused_update[i] = (entry[i] & cur_used[i]) |
> + unused_update[i] = (entry[i] & (cur_used[i] | ignored[i])) |
> (target[i] & ~cur_used[i]);
This can't be right? We don't want to ever copy an ignored bit from
entry, the ignored bits should always come from target. The line
should be left alone.
Jason
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