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Message-ID: <aTSI7iFaS1BnmDg5@nvidia.com>
Date: Sat, 6 Dec 2025 11:50:06 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Shuai Xue <xueshuai@...ux.alibaba.com>
CC: <jgg@...dia.com>, <will@...nel.org>, <robin.murphy@....com>,
<joro@...tes.org>, <linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>,
<skolothumtho@...dia.com>, <praan@...gle.com>
Subject: Re: [PATCH rc v1 4/4] iommu/arm-smmu-v3-test: Add nested s1bypass
coverage
On Sat, Dec 06, 2025 at 08:34:09PM +0800, Shuai Xue wrote:
>
>
> 在 2025/12/6 08:52, Nicolin Chen 写道:
> > STE in a nested case requires both S1 and S2 fields. And this makes the use
> > case different from the existing one.
> >
> > Add coverage for previously failed cases shifting between S2-only and S1+S2
> > STEs.
> >
> > Signed-off-by: Nicolin Chen <nicolinc@...dia.com>
> > ---
> > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c | 32 +++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > index 9287904c93a2..56bdcf5a517e 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c
> > @@ -553,6 +553,36 @@ static void arm_smmu_v3_write_ste_test_s2_to_s1_stall(struct kunit *test)
> > NUM_EXPECTED_SYNCS(3));
> > }
> > +static void
> > +arm_smmu_v3_write_ste_test_nested_s1dssbypass_to_s1bypass(struct kunit *test)
> > +{
> > + struct arm_smmu_ste s1_ste;
> > + struct arm_smmu_ste s2_ste;
> > +
> > + arm_smmu_test_make_s2_ste(&s1_ste, ARM_SMMU_MASTER_TEST_ATS);
> > + arm_smmu_test_make_cdtable_ste(&s1_ste, STRTAB_STE_1_S1DSS_SSID0,
>
> arm_smmu_test_make_s2_ste() makes a s2 ste and it will be overwrited by
> arm_smmu_test_make_cdtable_ste(). Finnaly, we got a s1 STE, not a nested
> s1dssbypass ste.
You are right. There is memset.
> I think we need a function like arm_smmu_make_nested_cd_table_ste()
> here.
>
> Besides, from the function name, I think you mean
> STRTAB_STE_1_S1DSS_BYPASS?
Yes, I will fix these.
Thanks
Nicolin
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