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Message-ID: <20251210164327.GA3477281@bhelgaas>
Date: Wed, 10 Dec 2025 10:43:27 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: zhangsenchuan@...incomputing.com
Cc: bhelgaas@...gle.com, mani@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, lpieralisi@...nel.org, kwilczynski@...nel.org,
	robh@...nel.org, p.zabel@...gutronix.de, jingoohan1@...il.com,
	gustavo.pimentel@...opsys.com, linux-pci@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	christian.bruel@...s.st.com, mayank.rana@....qualcomm.com,
	shradha.t@...sung.com, krishna.chundru@....qualcomm.com,
	thippeswamy.havalige@....com, inochiama@...il.com, Frank.li@....com,
	ningyu@...incomputing.com, linmin@...incomputing.com,
	pinkesh.vaghela@...fochips.com, ouyanghui@...incomputing.com
Subject: Re: [PATCH v7 2/3] PCI: eic7700: Add Eswin PCIe host controller
 driver

On Tue, Dec 02, 2025 at 05:04:06PM +0800, zhangsenchuan@...incomputing.com wrote:
> From: Senchuan Zhang <zhangsenchuan@...incomputing.com>
> 
> Add driver for the Eswin EIC7700 PCIe host controller, which is based on
> the DesignWare PCIe core, IP revision 5.96a. The PCIe Gen.3 controller
> supports a data rate of 8 GT/s and 4 channels, support INTx and MSI
> interrupts.

> +static int eic7700_pcie_host_init(struct dw_pcie_rp *pp)
> ...
> +	/*
> +	 * The PWR and DBI Reset signals are respectively used to reset the
> +	 * PCIe controller and the DBI registers.
> +	 * The PERST# signal is a reset signal that simultaneously controls the
> +	 * PCIe controller, PHY, and Endpoint.
> +	 * Before configuring the PHY, the PERST# signal must first be
> +	 * deasserted.
> +	 * The external reference clock is supplied simultaneously to the PHY
> +	 * and EP. When the PHY is configurable, the entire chip already has
> +	 * stable power and reference clock.
> +	 * The PHY will be ready within 20ms after writing app_hold_phy_rst
> +	 * register of ELBI register space.

Add blank lines between paragraphs.

> +static int eic7700_pcie_probe(struct platform_device *pdev)
> ...
> +	pci->no_pme_handshake = pcie->data->no_pme_handshake;

This needs to go in the 3/3 "PCI: dwc: Add no_pme_handshake flag and
skip PME_Turn_Off broadcast" patch because "no_pme_handshake" doesn't
exist yet so this patch doesn't build by itself.

> +static const struct dev_pm_ops eic7700_pcie_pm_ops = {
> +	NOIRQ_SYSTEM_SLEEP_PM_OPS(eic7700_pcie_suspend_noirq,
> +				  eic7700_pcie_resume_noirq)
> +};

Use DEFINE_NOIRQ_DEV_PM_OPS() instead.  The collection of PM-related
macros is confusing to say the least, and they're not used
consistently across the PCIe drivers, but I *think* the rule of thumb
should be:

  Prefer DEFINE_NOIRQ_DEV_PM_OPS() over NOIRQ_SYSTEM_SLEEP_PM_OPS()
  when possible and omit pm_sleep_ptr() and pm_ptr().

Bjorn

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