linux-kernel - Re: [PATCH] arm64: dts: rockchip: enable dual 2.5GbE on Rock 5T

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Message-ID: <2080394.PIDvDuAF1L@diego>
Date: Mon, 15 Dec 2025 22:47:55 +0100
From: Heiko Stübner <heiko@...ech.de>
To:
 Martin Holovský (Probably Nothing s.r.o. )
 <mh@...bably.group>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: enable dual 2.5GbE on Rock 5T

Am Montag, 15. Dezember 2025, 14:51:03 Mitteleuropäische Normalzeit schrieb Heiko Stuebner:
> 
> On Fri, 12 Dec 2025 17:23:35 +0100, "Martin Holovský (Probably Nothing s.r.o. )" wrote:
> > The Radxa Rock 5T board features two RTL8125B 2.5GbE Ethernet controllers
> > connected via PCIe lanes pcie2x1l0 (fe170000) and pcie2x1l2 (fe190000).
> > Currently only one interface is functional because the PCIe controller
> > nodes lack the necessary reset GPIO configuration.
> > 
> > Without the reset-gpios property, the RTL8125B PHYs remain in reset state
> > and are not enumerated by the PCIe bus. This results in only one Ethernet
> > interface being detected, or none at all depending on U-Boot initialization.
> > 
> > [...]
> 
> Applied, thanks!
> 
> [1/1] arm64: dts: rockchip: enable dual 2.5GbE on Rock 5T
>       commit: 96029ffeccf677b1e4baa98f30909a83a485b6d7
> 
> I've resorted both the pcie phandles as well as the pinctrl entries
> pcie2-0 comes before pcie2-1 etc :-) .

and dropped again.

Please resend this patch with a proper Signed-off-by line, as stated
by the developers certificate of origin.

Also, what is this probably nothing s.r.o?

Heiko