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Message-ID: <8fe80735-dc06-4629-acc3-d6529e61d959@sirena.org.uk>
Date: Wed, 17 Dec 2025 14:11:23 +0000
From: Mark Brown <broonie@...nel.org>
To: Sascha Hauer <s.hauer@...gutronix.de>
Cc: Shenghao Ding <shenghao-ding@...com>, Kevin Lu <kevin-lu@...com>,
Baojun Xu <baojun.xu@...com>, Liam Girdwood <lgirdwood@...il.com>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Clark Williams <clrkwllms@...nel.org>,
Steven Rostedt <rostedt@...dmis.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Andrew Davis <afd@...com>,
Dan Murphy <dmurphy@...com>, linux-sound@...r.kernel.org,
linux-kernel@...r.kernel.org, Kevin Lu <luminlong@....com>,
linux-rt-devel@...ts.linux.dev, devicetree@...r.kernel.org,
Emil-Juhl <emdj@...g-olufsen.dk>
Subject: Re: [PATCH 05/11] ASoC: tlv320adcx140: implement register caching
On Wed, Dec 17, 2025 at 02:54:55PM +0100, Sascha Hauer wrote:
> The tlv320adcx140 can be connected to controllable AVDD/IOVDD regulators
> which when disabled will reset the registers to their default. In
> preparation for adding support for them implement register caching.
This patch doesn't actually enable register caching, there's no cache
type specified. Indeed, the driver already has a register cache which
for some reason is REGCACHE_FLAT (which seems rather bogus and will have
defaulted most of the registers to 0 which may or may not be a good
idea). This looks like it's a substantial improvement but the change
doesn't correspond to the changelog.
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