linux-kernel - [tip: perf/core] perf/x86/intel: Add Airmont NP

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <176597508029.510.14746218727638398447.tip-bot2@tip-bot2>
Date: Wed, 17 Dec 2025 12:38:00 -0000
From: "tip-bot2 for Martin Schiller" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Martin Schiller <ms@....tdt.de>,
 "Peter Zijlstra (Intel)" <peterz@...radead.org>,
 Dapeng Mi <dapeng1.mi@...ux.intel.com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: perf/core] perf/x86/intel: Add Airmont NP

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     a08340fd291671c54d379d285b2325490ce90ddd
Gitweb:        https://git.kernel.org/tip/a08340fd291671c54d379d285b2325490ce90ddd
Author:        Martin Schiller <ms@....tdt.de>
AuthorDate:    Mon, 24 Nov 2025 08:48:45 +01:00
Committer:     Peter Zijlstra <peterz@...radead.org>
CommitterDate: Wed, 17 Dec 2025 13:31:08 +01:00

perf/x86/intel: Add Airmont NP

The Intel / MaxLinear Airmont NP (aka Lightning Mountain) supports the
same architectual and non-architecural events as Airmont.

Signed-off-by: Martin Schiller <ms@....tdt.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Link: https://patch.msgid.link/20251124074846.9653-3-ms@dev.tdt.de
---
 arch/x86/events/intel/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 0553c11..1840ca1 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -7410,6 +7410,7 @@ __init int intel_pmu_init(void)
 	case INTEL_ATOM_SILVERMONT_D:
 	case INTEL_ATOM_SILVERMONT_MID:
 	case INTEL_ATOM_AIRMONT:
+	case INTEL_ATOM_AIRMONT_NP:
 	case INTEL_ATOM_SILVERMONT_MID2:
 		memcpy(hw_cache_event_ids, slm_hw_cache_event_ids,
 			sizeof(hw_cache_event_ids));