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Message-ID: <e402ac33-c23a-46a1-b67e-097eb2ea7752@kernel.org>
Date: Thu, 18 Dec 2025 17:06:11 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Peter Griffin <peter.griffin@...aro.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
 André Draszik <andre.draszik@...aro.org>,
 Tudor Ambarus <tudor.ambarus@...aro.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Sam Protsenko <semen.protsenko@...aro.org>,
 Sylwester Nawrocki <s.nawrocki@...sung.com>,
 Chanwoo Choi <cw00.choi@...sung.com>
Cc: Will McVicker <willmcvicker@...gle.com>, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
 kernel-team@...roid.com
Subject: Re: [PATCH v5 3/4] clk: samsung: Implement automatic clock gating
 mode for CMUs

On 14/11/2025 15:16, Peter Griffin wrote:
> Update exynos_arm64_init_clocks() so that it enables the automatic clock
> mode bits in the CMU option register if the auto_clock_gate flag and
> option_offset fields are set for the CMU. To ensure compatibility with
> older DTs (that specified an incorrect CMU reg size), detect this and
> fallback to manual clock gate mode as the auto clock mode feature depends
> on registers in this area.
> 
> The CMU option register bits are global and effect every clock component in
> the CMU, as such clearing the GATE_ENABLE_HWACG bit and setting GATE_MANUAL
> bit on every gate register is only required if auto_clock_gate is false.
> 
> Additionally if auto_clock_gate is enabled the dynamic root clock gating
> and memclk registers will be configured in the corresponding CMUs sysreg
> bank. These registers are exposed via syscon, so the register
> samsung_clk_save/restore paths are updated to also take a regmap.
> 
> As many gates for various Samsung SoCs are already exposed in the Samsung
> clock drivers a new samsung_auto_clk_gate_ops is implemented. This uses
> some CMU debug registers to report whether clocks are enabled or disabled
> when operating in automatic mode. This allows
> /sys/kernel/debug/clk/clk_summary to still dump the entire clock tree and
> correctly report the status of each clock in the system.
> 
> Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
> ---
> Changes in v3:
> - Add missing 'np' func param to kerneldoc in samsung_cmu_register_clocks
> (0-DAY CI)
> 
> Changes in v2:
> - Fallback to manual clock gate mode for old DTs with incorrect CMU size
> (added samsung_is_auto_capable()) (Krzysztof)
> - Rename OPT_UNKNOWN bit to OPT_EN_LAYER2_CTRL (Andre)
> - Rename OPT_EN_MEM_PM_GATING to OPT_EN_MEM_PWR_GATING (Andre)
> - Reverse Option bit definitions LSB -> MSB (Krzysztof)
> - Update kerneldoc init_clk_regs comment (Andre)
> - Fix space on various comments (Andre)
> - Fix regmap typo on samsung_clk_save/restore calls (Andre)
> - Include error code in pr_err message (Andre)
> - Add macros for dcrg and memclk (Andre)
> - Avoid confusing !IS_ERR_OR_NULL(ctx->sysreg) test (Krzysztof)
> - Update kerneldoc to mention drcg_offset & memclk_offset are in sysreg (Andre)
> - Fix 0-DAY CI randconfig warning (0-DAY CI)
> - Update clk-s5pv210 and clk-s3c64xx.c samsung_clk_sleep_init call sites (Peter)
> ---

This does not apply, please rebase entire set:

Patch failed at 0001 clk: samsung: Implement automatic clock gating mode
for CMUs
error: patch failed: drivers/clk/samsung/clk.c:289
error: drivers/clk/samsung/clk.c: patch does not apply


Best regards,
Krzysztof

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