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Message-ID: <aUVkzV447+NDmLg1@yilunxu-OptiPlex-7050>
Date: Fri, 19 Dec 2025 22:44:29 +0800
From: Xu Yilun <yilun.xu@...ux.intel.com>
To: adrianhoyin.ng@...era.com
Cc: dinguyen@...nel.org, mdf@...nel.org, yilun.xu@...el.com,
trix@...hat.com, linux-fpga@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] firmware: stratix10-svc: Add SMMU support for Agilex5
> @@ -1907,8 +1988,52 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
> controller->genpool = genpool;
> controller->task = NULL;
> controller->invoke_fn = invoke_fn;
> + controller->is_smmu_enabled = false;
> + controller->sdm_dma_addr_offset = 0x0;
> init_completion(&controller->complete_status);
>
> + if (of_device_is_compatible(node, "intel,agilex5-svc")) {
> + if (device_iommu_mapped(&pdev->dev)) {
> + controller->is_smmu_enabled = true;
> + controller->sdm_dma_addr_offset = AGILEX5_SDM_DMA_ADDR_OFFSET;
> + pr_debug("Intel Service Layer Driver: IOMMU Present\n");
> + controller->domain = iommu_get_dma_domain(dev);
> +
> + if (!controller->domain) {
> + pr_warn("Intel Service Layer Driver: Error IOMMU domain\n");
> + ret = -ENODEV;
> + goto err_destroy_pool;
> + } else {
> + ret = iova_cache_get();
> + if (ret < 0) {
> + pr_warn("Intel Service Layer Driver: IOVA cache failed\n");
> + iommu_domain_free(controller->domain);
> + ret = -ENODEV;
> + goto err_destroy_pool;
> + }
> + ret = iommu_attach_device(controller->domain, dev);
I don't understand why you retrieved device's default domain and set it
back to the same device. Seems nothing changed?
> + if (ret) {
> + pr_warn("Intel Service Layer Driver: Error IOMMU attach failed\n");
> + iova_cache_put();
> + iommu_domain_free(controller->domain);
> + ret = -ENODEV;
> + goto err_destroy_pool;
> + }
> + }
> +
> + order = __ffs(controller->domain->pgsize_bitmap);
> + init_iova_domain(&controller->carveout.domain, 1UL << order,
> + IOMMU_STARTING_ADDR);
And why you have to carveout an iova space? The requirement is just the
device can only accept 24bit iova address, that's normal requrement for
many devices, can we just do:
dma_set_mask(dev, DMA_BIT_MASK(24));
dma_set_coherent_mask(dev, DMA_BIT_MASK(24));
dma_map_single(...)
instead of manipulating iova && iommu mapping by your own?
Another thing is why we should bifurcate direct dma & iommu mapped dma
in the driver, DMA APIs take care of these 2 cases.
Thanks,
Yilun
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