linux-kernel - Re: [PATCH v3 1/2] Documentation/driver-api/cxl: BIOS/EFI expectation update

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Message-ID: <20251219172810.00002e70@huawei.com>
Date: Fri, 19 Dec 2025 17:28:10 +0000
From: Jonathan Cameron <jonathan.cameron@...wei.com>
To: Gregory Price <gourry@...rry.net>
CC: <linux-cxl@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <kernel-team@...a.com>, <dave@...olabs.net>,
	<dave.jiang@...el.com>, <alison.schofield@...el.com>,
	<vishal.l.verma@...el.com>, <ira.weiny@...el.com>,
	<dan.j.williams@...el.com>, <corbet@....net>, <rakuram.e96@...il.com>,
	<alucerop@....com>
Subject: Re: [PATCH v3 1/2] Documentation/driver-api/cxl: BIOS/EFI
 expectation update

On Fri, 19 Dec 2025 12:05:37 -0500
Gregory Price <gourry@...rry.net> wrote:

> Add a snippet about what Linux expects BIOS/EFI to do (and not
> to do) to the BIOS/EFI section.
> 
> Suggested-by: Alejandro Lucero Palau <alucerop@....com>
> Signed-off-by: Gregory Price <gourry@...rry.net>

Nice.  Best of all I can blame you if our bios folk moan at me :)

Reviewed-by: Jonathan Cameron <jonathan.cameron@...wei.com>

> ---
>  .../driver-api/cxl/platform/bios-and-efi.rst  | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst
> index a9aa0ccd92af..9034c206cf8e 100644
> --- a/Documentation/driver-api/cxl/platform/bios-and-efi.rst
> +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst
> @@ -29,6 +29,26 @@ at :doc:`ACPI Tables <acpi>`.
>     on physical memory region size and alignment, memory holes, HDM interleave,
>     and what linux expects of HDM decoders trying to work with these features.
>  
> +
> +Linux Expectations of BIOS/EFI Software
> +=======================================
> +Linux expects BIOS/EFI software to construct sufficient ACPI tables (such as
> +CEDT, SRAT, HMAT, etc) and platform-specific configurations (such as HPA spaces
> +and host-bridge interleave configurations) to allow the Linux driver to
> +subsequently configure the devices in the CXL fabric at runtime.
> +
> +Programming of HDM decoders and switch ports is not required, and may be
> +deferred to the CXL driver based on admin policy (e.g. udev rules).
> +
> +Some platforms may require pre-programming HDM decoders and locking them
> +due to quirks (see: Zen5 address translation), but this is not the normal,
> +"expected" configuration path.  This should be avoided if possible.
> +
> +Some platforms may wish to pre-configure these resources to bring memory
> +up without requiring CXL driver support.  These platform vendors should
> +test their configurations with the existing CXL driver and provide driver
> +support for their auto-configurations if features like RAS are required.
> +
>  UEFI Settings
>  =============
>  If your platform supports it, the :code:`uefisettings` command can be used to