linux-kernel - Re: [PATCH v2 1/2] PCI: rzg3s-host: Use pci_generic_config

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Message-ID: <aUZdNOygobOBZLcI@shikoro>
Date: Sat, 20 Dec 2025 09:24:20 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: bhelgaas@...gle.com, lpieralisi@...nel.org, kwilczynski@...nel.org,
	mani@...nel.org, robh@...nel.org, linux-pci@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
	Bjorn Helgaas <helgaas@...nel.org>
Subject: Re: [PATCH v2 1/2] PCI: rzg3s-host: Use pci_generic_config_write()
 for the root bus

On Wed, Dec 17, 2025 at 01:15:09PM +0200, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> 
> The Renesas RZ/G3S host controller allows writing to read-only PCIe
> configuration registers when the RZG3S_PCI_PERM_CFG_HWINIT_EN bit is set in
> the RZG3S_PCI_PERM register. However, callers of struct pci_ops::write
> expect the semantics defined by the PCIe specification, meaning that writes
> to read-only registers must not be allowed.
> 
> The previous custom struct pci_ops::write implementation for the root bus
> temporarily enabled write access before calling pci_generic_config_write().
> This breaks the expected semantics.
> 
> Remove the custom implementation and simply use pci_generic_config_write().
> 
> Along with this change, the updates of the PCI_PRIMARY_BUS,
> PCI_SECONDARY_BUS, and PCI_SUBORDINATE_BUS registers were moved so that
> they no longer depends on the RZG3S_PCI_PERM_CFG_HWINIT_EN bit in the
> RZG3S_PCI_PERM_CFG register, since these registers are R/W.
> 
> Fixes: 7ef502fb35b2 ("PCI: Add Renesas RZ/G3S host controller driver")
> Suggested-by: Bjorn Helgaas <helgaas@...nel.org>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

Tested-by: Wolfram Sang <wsa+renesas@...g-engineering.com>


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