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Message-ID: <20251221-tunneling-intelligent-dogfish-d44a01@quoll>
Date: Sun, 21 Dec 2025 16:10:44 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Chen-Yu Tsai <wens@...nel.org>
Cc: Jernej Skrabec <jernej@...nel.org>,
Samuel Holland <samuel@...lland.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Mark Brown <broonie@...nel.org>, Andre Przywara <andre.przywara@....com>,
linux-spi@...r.kernel.org, devicetree@...r.kernel.org, linux-sunxi@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/4] spi: dt-bindings: sun6i: Add compatibles for A523's
SPI controllers
On Sun, Dec 21, 2025 at 07:05:08PM +0800, Chen-Yu Tsai wrote:
> The A523 has four SPI controllers. One of them supports MIPI DBI mode
> in addition to standard SPI.
>
> Compared to older generations, this newer controller now has a combined
> counter for the RX FIFO ad buffer levels. In older generations, the
> RX buffer level was a separate bitfield in the FIFO status register.
>
> In practice this difference is negligible. The buffer is mostly
> invisible to the implementation. If programmed I/O transfers are limited
> to the FIFO size, then the contents of the buffer seem to always be
> flushed over to the FIFO. For DMA, the DRQ trigger levels are only tied
> to the FIFO levels. In all other aspects, the controller is the same as
> the one in the R329.
>
> Add new compatible strings for the new controllers.
>
> Signed-off-by: Chen-Yu Tsai <wens@...nel.org>
> ---
> .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@....qualcomm.com>
Best regards,
Krzysztof
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