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Message-ID: <6113404.MhkbZ0Pkbq@jernej-laptop>
Date: Sun, 21 Dec 2025 20:12:18 +0100
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: Uwe Kleine-König <u.kleine-koenig@...libre.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Samuel Holland <samuel@...lland.org>, Philipp Zabel <p.zabel@...gutronix.de>,
Richard Genoud <richard.genoud@...tlin.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, Richard Genoud <richard.genoud@...tlin.com>
Subject: Re: [PATCH v2 0/4] Introduce Allwinner H616 PWM controller
Dne sreda, 17. december 2025 ob 09:25:00 Srednjeevropski standardni čas je Richard Genoud napisal(a):
> Allwinner H616 PWM controller is quite different from the A10 one.
>
> It can drive 6 PWM channels, and like for the A10, each channel has a
> bypass that permits to output a clock, bypassing the PWM logic, when
> enabled.
>
> But, the channels are paired 2 by 2, sharing a first set of
> MUX/prescaler/gate.
> Then, for each channel, there's another prescaler (that will be bypassed
> if the bypass is enabled for this channel).
>
> It looks like that:
> _____ ______ ________
> OSC24M --->| | | | | |
> APB1 ----->| Mux |--->| Gate |--->| /div_m |-----> PWM_clock_src_xy
> |_____| |______| |________|
> ________
> | |
> +->| /div_k |---> PWM_clock_x
> | |________|
> | ______
> | | |
> +-->| Gate |----> PWM_bypass_clock_x
> | |______|
> PWM_clock_src_xy -----+ ________
> | | |
> +->| /div_k |---> PWM_clock_y
> | |________|
> | ______
> | | |
> +-->| Gate |----> PWM_bypass_clock_y
> |______|
>
> Where xy can be 0/1, 2/3, 4/5
>
> PWM_clock_x/y serve for the PWM purpose.
> PWM_bypass_clock_x/y serve for the clock-provider purpose.
> The common clock framework has been used to manage those clocks.
>
> This PWM driver serves as a clock-provider for PWM_bypass_clocks.
> This is needed for example by the embedded AC300 PHY which clock comes
> from PMW5 pin (PB12).
No. Drop all clocks related code and make this pure PWM driver, like pwm-sun4i
is. For AC300, AC200 or whatever other device may need clock produced by PWM,
pwm-clock can be used like this:
ac300_pwm_clk: ac300-clk {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
pwms = <&pwm 1 42 0>;
};
ac300 {
...
clocks = <&ac300_pwm_clk>;
...
};
Best regards,
Jernej
>
> This series is based onto v6.19-rc1
>
> Changes since v1:
> - rebase onto v6.19-rc1
> - add missing headers
> - remove MODULE_ALIAS (suggested by Krzysztof)
> - use sun4i-pwm binding instead of creating a new one (suggested by Krzysztof)
> - retrieve the parent clocks from the devicetree
> - switch num_parents to unsigned int
>
> Richard Genoud (4):
> dt-bindings: pwm: allwinner: add h616 pwm compatible
> pwm: sun50i: Add H616 PWM support
> arm64: dts: allwinner: h616: add PWM controller
> MAINTAINERS: Add entry on Allwinner H616 PWM driver
>
> .../bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 19 +-
> MAINTAINERS | 5 +
> .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 47 +
> drivers/pwm/Kconfig | 12 +
> drivers/pwm/Makefile | 1 +
> drivers/pwm/pwm-sun50i-h616.c | 892 ++++++++++++++++++
> 6 files changed, 975 insertions(+), 1 deletion(-)
> create mode 100644 drivers/pwm/pwm-sun50i-h616.c
>
>
> base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
>
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