linux-kernel - drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:3494:82: sparse: sparse: Using plain integer as NULL pointer

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <202512230120.bouZOGIU-lkp@intel.com>
Date: Tue, 23 Dec 2025 01:34:20 +0800
From: kernel test robot <lkp@...el.com>
To: Ilya Bakoulin <Ilya.Bakoulin@....com>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
 Alex Deucher <alexander.deucher@....com>,
 Alvin Lee <alvin.lee2@....com>,
 Aurabindo Pillai <aurabindo.pillai@....com>
Subject: 
 drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:3494:82:
 sparse: sparse: Using plain integer as NULL pointer

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   9448598b22c50c8a5bb77a9103e2d49f134c9578
commit: f96012baa5d3b4336092855e4e6d24830ea50736 drm/amd/display: add new block sequence-building/executing functions
date:   9 weeks ago
config: i386-randconfig-063-20251221 (https://download.01.org/0day-ci/archive/20251223/202512230120.bouZOGIU-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251223/202512230120.bouZOGIU-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512230120.bouZOGIU-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c:3494:82: sparse: sparse: Using plain integer as NULL pointer

vim +3494 drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c

  3458	
  3459	void dcn401_post_unlock_reset_opp_sequence(
  3460			struct dc *dc,
  3461			struct pipe_ctx *opp_head,
  3462			struct block_sequence_state *seq_state)
  3463	{
  3464		struct display_stream_compressor *dsc = opp_head->stream_res.dsc;
  3465		struct dccg *dccg = dc->res_pool->dccg;
  3466	
  3467		/* Wait for all DPP pipes in current mpc blending tree completes double
  3468		 * buffered disconnection before resetting OPP
  3469		 */
  3470		if (dc->hwss.wait_for_mpcc_disconnect_sequence)
  3471			dc->hwss.wait_for_mpcc_disconnect_sequence(dc, dc->res_pool, opp_head, seq_state);
  3472	
  3473		if (dsc) {
  3474			bool *is_ungated = NULL;
  3475			/* Check DSC power gate status */
  3476			if (dc->hwseq && dc->hwseq->funcs.dsc_pg_status) {
  3477				hwss_add_dsc_pg_status(seq_state, dc->hwseq, dsc->inst, false);
  3478			}
  3479	
  3480			/* Seamless update specific where we will postpone non
  3481				* double buffered DSCCLK disable logic in post unlock
  3482				* sequence after DSC is disconnected from OPP but not
  3483				* yet power gated.
  3484				*/
  3485	
  3486			/* DSC wait disconnect pending clear */
  3487			hwss_add_dsc_wait_disconnect_pending_clear(seq_state, dsc, is_ungated);
  3488	
  3489			/* DSC disable */
  3490			hwss_add_dsc_disable(seq_state, dsc, is_ungated);
  3491	
  3492			/* Set reference DSCCLK */
  3493			if (dccg && dccg->funcs->set_ref_dscclk) {
> 3494				hwss_add_dccg_set_ref_dscclk(seq_state, dccg, dsc->inst, 0);
  3495			}
  3496		}
  3497	}
  3498	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki