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Message-Id: <20251223-enable-qualcomm-crypto-engine-for-monaco-v2-1-6274c1f6136f@oss.qualcomm.com>
Date: Tue, 23 Dec 2025 12:25:18 +0530
From: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
Subject: [PATCH v2] arm64: dts: qcom: monaco: add QCrypto node
Add Qualcomm Crypto Engine device node for Monaco platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
---
QCE and Crypto DMA nodes patch was applied as part of the
commit a86d84409947 ("arm64: dts: qcom: qcs8300: add QCrypto nodes"),
however was partially reverted by commit cdc117c40537 ("arm64: dts:
qcom: qcs8300: Partially revert "arm64: dts: qcom: qcs8300: add
QCrypto nodes"") due to compatible string being miss-matched
against schema.
Resubmitting the enablement of QCE device node for monaco platform
with compatible-string being aligned with qcom-qce schema.
Bindings and Crypto DMA nodes for the same platform is already
present in the tree.
---
Changes in v2:
- Move the description and history for the patch in cover-letter as suggested in patchset v1.
- Use 0x0 inplace of 0x00 for iommus SMR mask field as suggested in patchset v1.
- Link to v1: https://lore.kernel.org/r/20251222-enable-qualcomm-crypto-engine-for-monaco-v1-1-06741d6ea66a@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/monaco.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 816fa2af8a9a663b8ad176f93d2f18284a08c3d1..c0cf56c46ed50bd558f7cdfc8e55a58d738ef911 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -2350,6 +2350,18 @@ ice: crypto@...8000 {
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};
+ crypto: crypto@...a000 {
+ compatible = "qcom,qcs8300-qce", "qcom,sm8150-qce", "qcom,qce";
+ reg = <0x0 0x01dfa000 0x0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@...0000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
---
base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8
change-id: 20251222-enable-qualcomm-crypto-engine-for-monaco-7c6b9112779d
Best regards,
--
Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
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